Method for singulating an assemblage into semiconductor chips, and semiconductor chip

Abstract

A method for singulating an assemblage into a plurality of semiconductor chips is specified, wherein an assemblage comprising a carrier, a semiconductor layer sequence and a metallic layer is provided. Separating trenches are formed in the carrier. The assemblage is subjected to mechanical loading, with the result that the metallic layer breaks along the separating trenches and the assemblage is singulated into semiconductor chips, wherein the singulated semiconductor chips each have part of the semiconductor layer sequence, of the carrier and of the metallic layer. A semiconductor chip is furthermore specified.

1 . A method for singulating an assemblage into a plurality of semiconductor chips comprising the following steps:
 a) providing an assemblage comprising a carrier, a semiconductor layer sequence and a metallic layer, the metallic layer being arranged between the semiconductor layer sequence and the carrier;   b) forming separating trenches in the carrier;   c) subjecting the assemblage to mechanical loading, with the result that the metallic layer breaks along the separating trenches and the assemblage is singulated into semiconductor chips, wherein the singulated semiconductor chips each have part of the semiconductor layer sequence, of the carrier and of the metallic layer;   wherein, after step b), the separating trenches extend completely through the carrier and the carrier comprises individual carrier bodies, the individual carrier bodies being still held together via the metallic layer.   
     
     
         2 . The method according to  claim 1 ,
 wherein the semiconductor layer sequence is completely severed prior to step c).   
     
     
         3 . The method according to  claim 1 ,
 wherein mesa trenches are formed to define individual semiconductor bodies from the semiconductor layer sequence.   
     
     
         4 . The method according to  claim 3 ,
 wherein the mesa trenches extend completely through the semiconductor layer sequence.   
     
     
         5 . The method according to  claim 3 ,
 wherein the mesa trenches are formed prior to the formation of the separating trenches, the separation trenches being formed along the mesa trenches.   
     
     
         6 . The method according to  claim 1 ,
 wherein the mechanical loading is effected by means of a pressure action on the assemblage in a direction running obliquely or perpendicularly to a main surface of the assemblage.   
     
     
         7 . The method according to  claim 1 ,
 wherein the metallic layer extends over the whole area of the assemblage before step c).   
     
     
         8 . The method according to  claim 1 ,
 wherein the separating trenches are formed by means of a chemical method.   
     
     
         9 . The method according to  claim 1 ,
 wherein steps b) and c) are carried out from opposite sides of the assemblage.   
     
     
         10 . The method according to  claim 1 ,
 wherein the assemblage is exposed to a mechanical stress at least along a lateral direction before step c).   
     
     
         11 . The method according to  claim 1 ,
 wherein the assemblage is fixed to an auxiliary carrier before singulation and the semiconductor chips are present on the auxiliary carrier for further processing after singulation.   
     
     
         12 . The method according to  claim 11 ,
 wherein the semiconductor layer sequence, after step b), is fixed to the auxiliary carrier at that side of the assemblage from which the separating trenches are introduced into the carrier.   
     
     
         13 . The method according to  claim 1 ,
 wherein the assemblage is exposed to a liquid jet or gas jet in step c).   
     
     
         14 . The method according to  claim 13 ,
 wherein carbon dioxide is used as jet medium.   
     
     
         15 . The method according to  claim 1 ,
 wherein the assemblage is subjected to a pressure wave in step c).   
     
     
         16 . A semiconductor chip comprising a semiconductor body, a carrier body and a metallic layer, which are arranged one on top of another in a vertical direction, wherein the metallic layer has a breaking edge at at least one side surface of the semiconductor chip. 
     
     
         17 . The semiconductor chip according to  claim 16 ,
 wherein the metallic layer delimits the semiconductor chip on a side of the carrier body facing away from the semiconductor body in a vertical direction.   
     
     
         18 . The semiconductor chip according to  claim 16 ,
 wherein the metallic layer is arranged between the carrier body and the semiconductor body.