On-die capacitor (odc) structure

Abstract

An on-die-capacitor structure includes a first capacitor and a second capacitor. The first capacitor may have first and second terminals. The first and second terminals are directly connected to first and second power supply rail structures, respectively. The first power supply rail structure is different from the second power supply rail structure. The second capacitor may have third and fourth terminals. The second capacitor is connected in series between the second power supply rail structure and a third power supply rail structure. The third power supply rail structure is different from the first and second power supply rail structures. The third and fourth terminals are directly connected to the second and third power supply rail structures, respectively. The first capacitor may have a first capacitance and the second capacitor structure may have a second capacitance that is greater than the first capacitance.

What is claimed is: 
     
         1 . An integrated circuit, comprising:
 power supply circuitry;   circuitry coupled to the power supply circuitry via first and second power rails; and   a capacitor structure interposed between the first and second power rails, wherein the capacitor structure comprises:
 a first capacitor that includes a first conductive structure; and 
 a second capacitor that includes a second conductive structure that is separate from the first conductive structure and that is coupled in series with the first capacitor, wherein the first conductive structure of the first capacitor and the second conductive structure of a second capacitor are directly connected to a third power rail that is different from the first and second power rails. 
   
     
     
         2 . The integrated circuit defined in  claim 1 , wherein the first capacitor includes a third conductive structure that is connected to the first power rail and the second capacitor includes a fourth conductive structure that is connected to the second power rail. 
     
     
         3 . The integrated circuit defined in  claim 2 , wherein the power supply circuitry provides a first voltage level to the first power rail, provides a second voltage level to the second power rail, and provides a third voltage level to the third power rail. 
     
     
         4 . The integrated circuit defined in  claim 3 , wherein the first voltage level is greater than the third voltage level, and the third voltage level is greater than the second voltage level. 
     
     
         5 . The integrated circuit defined in  claim 1 , wherein the integrated circuit is formed from a semiconductor substrate and a plurality of metal layers on the semiconductor substrate, and wherein the first capacitor is formed from first and second metal layers in the plurality of metal layers, and the second capacitor is formed from the first and second metal layers. 
     
     
         6 . The integrated circuit defined in  claim 5 , wherein the first conductive structure is formed in the first metal layer and the second conductive structure is formed in the first metal layer. 
     
     
         7 . The integrated circuit defined in  claim 6 , wherein the first conductive structure is directly connected to the first power rail through a single via. 
     
     
         8 . The integrated circuit defined in  claim 5 , wherein the first conductive structure is formed in the first metal layer, the second capacitor includes a third conductive structure formed in the second metal layer, the first conductive structure is connected to the third power rail through a first via, and the third conductive structure is connected to the third power rail through a second via that is separated from the first via. 
     
     
         9 . The integrated circuit defined in  claim 8 , wherein the first capacitor includes a fourth conductive structure formed in the second metal layer, the second conductive structure is formed in the first metal layer. 
     
     
         10 . The integrated circuit defined in  claim 5 , wherein the first, second and third power rails are formed from a third metal layer in the plurality of metal layers. 
     
     
         11 . The integrated circuit defined in  claim 10 , wherein the first conductive structure of the first capacitor is connected to the third power rail without any intervening metal layers, a fourth conductive structure of the first capacitor is connected to the first power rail without any intervening metal layers, the second conductive structure of the second capacitor is connected to the third power rail without any intervening metal layers, and a third conductive structure of the second capacitor is connected to the second power rail without any intervening metal layers. 
     
     
         12 . An integrated circuit die, comprising:
 a substrate;   a first metal layer that forms a first conductive plate for a first capacitor structure and a second conductive plate for a second capacitor structure, wherein the first capacitor structure is separated from the second capacitor structure and the first and second capacitor structures are coupled in series;   a second metal layer that forms a third conductive plate for the first capacitor structure;   a third metal layer that forms an intermediate power rail connected to the second and third conductive plates.   
     
     
         13 . The integrated circuit die defined in  claim 12 , wherein the first and second metal layers are consecutive metal layers separated by a single dielectric layer. 
     
     
         14 . The integrated circuit die defined in  claim 13 , wherein the second conductive plate in the first metal layer is connected to the intermediate power rail in the third metal layer and the third conductive plate in the second metal layer is connected to the intermediate power rail in the third metal layer. 
     
     
         15 . The integrated circuit die defined in  claim 12 , wherein the third metal layer forms a first power rail and a second power that are separated from the intermediate power rail. 
     
     
         16 . The integrated circuit die defined in  claim 12 , wherein the first and third metal layers are consecutive metal layers separated by a single dielectric layer. 
     
     
         17 . A capacitor structure, comprising:
 a first capacitor that includes a first conductive structure; and   a second capacitor that includes a second conductive structure and that is coupled in series with the first capacitor between first and second power rails, wherein the first conductive structure of the first capacitor and the second conductive structure of a second capacitor are shorted to a third power rail that is different from the first and second power rails, wherein the first conductive structure is separated from the second conductive structure.   
     
     
         18 . The capacitor structure defined in  claim 17 , wherein the first conductive structure comprises a first metal plate, the second conductive structure comprises a second metal plate, the first capacitor further comprises a third metal plate that is shorted to the first power rail, and the second capacitor further comprises a fourth metal plate that is shorted to the second power rail. 
     
     
         19 . The capacitor structure defined in  claim 17 , wherein the first capacitor as a first capacitance and the second capacitor has a second capacitance that is greater than the first capacitance. 
     
     
         20 . The capacitor structure defined in  claim 17 , wherein the first capacitor further comprises a third conductive structure that is coplanar with the second conductive structure of the second capacitor and the second capacitor further comprises a fourth conductive structure that is coplanar with the first conductive structure.