Metal bond pad with cobalt interconnect layer and solder thereon

Abstract

A method of forming bond pads includes providing a substrate including an integrated circuit (IC) device formed thereon having an oxidizable uppermost metal interconnect layer which provides a plurality of bond pads that are coupled to circuit nodes on the IC device. The plurality of bond pads includes a metal bond pad area. A cobalt including connection layer is deposited directly on the metal bond pad area. The cobalt including connection layer is patterned to provide a cobalt bond pad surface for the plurality of bond pads, and a solder material is formed on the cobalt bond pad surface.

1 . An integrated circuit (IC), comprising:
 a substrate including at least one IC device formed thereon;   a plurality of metal interconnect layers including an oxidizable uppermost metal interconnect layer which provides a plurality of bond pads coupled to circuit nodes on said IC device, said plurality of bond pads including a metal bond pad area,   a cobalt comprising connection layer including a cobalt bond pad surface directly on said metal bond pad area, and   a solder material on said cobalt bond pad surface.   
     
     
         2 . The IC of  claim 1 , further comprising at least one patterned dielectric passivation layer (passivation layer) defining a trench including dielectric sidewalls above said metal bond pad area, and wherein said cobalt comprising connection layer extends directly over said dielectric sidewalls onto said passivation layer to completely cap said metal bond pad area. 
     
     
         3 . The IC of  claim 1 , wherein said uppermost metal interconnect layer comprises primarily aluminum by weight. 
     
     
         4 . The IC of  claim 1 , wherein said solder material comprises a solder ball comprising both Sn and Ag. 
     
     
         5 . The IC of  claim 1 , wherein said uppermost metal interconnect layer comprises copper by weight, titanium, or a titanium compound material. 
     
     
         6 . The IC of  claim 1 , wherein said cobalt comprising connection layer comprises at least one non-cobalt transition metal in a concentration from 2 wt. % to 60 wt. %. 
     
     
         7 . The IC of  claim 1 , wherein a thickness of said cobalt comprising connection layer is between 100 Angstroms and 2 μm thick. 
     
     
         8 . The IC of  claim 1 , wherein said substrate comprises silicon. 
     
     
         9 . The IC of  claim 1 , wherein said solder material is directly on said cobalt bond pad surface, and wherein said cobalt comprising connection layer includes at least 99% cobalt by weight. 
     
     
         10 . An integrated circuit (IC), comprising:
 a substrate having an oxidizable uppermost metal interconnect layer which provides a plurality of bond pads coupled to circuit nodes, said plurality of bond pads including a metal bond pad area;   a cobalt comprising connection layer directly on said metal bond pad area, said cobalt comprising connection layer providing a cobalt bond pad surface on said plurality of bond pads; and   a solder material directly on said cobalt bond pad surface of the cobalt comprising connection layer to form a three layer stack of the solder material directly on the cobalt comprising connection layer directly on the oxidizable uppermost metal interconnect layer.   
     
     
         11 . The IC of  claim 10 , wherein said substrate further includes at least one patterned passivation layer defining a trench including dielectric sidewalls above said metal bond pad area, and wherein said cobalt comprising connection layer extends directly over said dielectric sidewalls onto said passivation layer to completely cap said metal bond pad area. 
     
     
         12 . The IC of  claim 10 , wherein said uppermost metal interconnect layer comprises primarily aluminum by weight. 
     
     
         13 . The IC of  claim 10 , wherein said solder material comprises a solder ball that comprises Sn and Ag. 
     
     
         14 . The IC of  claim 10 , wherein said uppermost metal interconnect layer comprises primarily copper by weight, titanium, or a titanium compound material. 
     
     
         15 . The IC of  claim 10 , wherein said cobalt comprising connection layer comprises at least one non-cobalt transition metal in a concentration from 2 wt. % to 60 wt. %. 
     
     
         16 . The IC of  claim 10 , wherein a thickness of said cobalt comprising connection layer is between 100 Angstroms and 2 μm thick. 
     
     
         17 . The IC of  claim 10 , wherein said cobalt comprising connection layer includes at least 99% cobalt by weight. 
     
     
         18 . An integrated circuit (IC), comprising:
 a plurality of bond pads coupled to circuit nodes on a substrate, said plurality of bond pads including a metal bond pad area comprising primarily aluminum;   a cobalt comprising connection layer directly on said aluminum metal bond pad area, the cobalt comprising connection layer having a cobalt bond pad surface on said plurality of bond pads; and   a solder ball directly on the cobalt bond pad surface of the cobalt comprising connection layer to form a three layer stack of the solder ball directly on the cobalt comprising connection layer which is directly on the aluminum of the metal bond pad area, wherein the solder ball comprises Sn and Ag.   
     
     
         19 . The IC of  claim 18 , wherein said substrate further includes at least one passivation layer defining a trench including dielectric sidewalls above said metal bond pad area, and wherein said cobalt comprising connection layer extends directly over said dielectric sidewalls onto said passivation layer to completely cap said metal bond pad area. 
     
     
         20 . The IC of  claim 18 , wherein said cobalt comprising connection layer comprises at least one non-cobalt transition metal in a concentration from 2 wt. % to 60 wt. %.