US2018240780A1PendingUtilityA1

Package substrate and package structure using the same

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Assignee: GENESIS PHOTONICS INCPriority: Mar 18, 2015Filed: Apr 23, 2018Published: Aug 23, 2018
Est. expiryMar 18, 2035(~8.7 yrs left)· nominal 20-yr term from priority
H10W 90/724H10W 74/142H10W 72/07554H10W 72/547H10W 42/121H10W 42/60H10W 90/00H10W 40/22H10W 70/65G02F 1/1336G02F 1/133603G02F 1/133602H01L 33/642H01L 33/502H01L 25/0756H01L 2933/0041H01L 33/50H01L 2933/0025H01L 33/60H01L 33/647H01L 33/48H01L 33/08H01L 33/508H01L 27/0248H01L 23/60H01L 33/486H01L 23/562H01L 29/866H01L 33/52H01L 27/15H01L 25/0657H01L 2924/18161H01L 25/0655H01L 2933/0058H01L 2224/16225H01L 33/56H01L 33/10H01L 2224/49107H01L 2933/0033H01L 2224/48091H01L 25/0753H10D 89/60H10D 8/25H10H 20/8516H10H 20/854H10H 20/0363H10H 20/0361H10H 20/036H10H 20/034H10H 29/10H10H 20/8585H10H 20/8582H10H 20/8512H10H 20/8506H10H 20/856H10H 20/852H10H 20/851H10H 20/814H10H 20/813H10H 20/85H10H 20/857G02F 1/133612
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Claims

Abstract

A package substrate is provided. The package substrate includes a base layer having a first surface and a second surface opposite to the first surface, a plurality of through holes penetrating the base layer, a first metal layer disposed on the first surface, and comprising an encircling portion and a plurality of upper pads arranged separately, wherein the encircling portion surrounds the upper pads to form a trench between the encircling portion and the upper pads, and a second metal layer disposed on the second surface and comprising a plurality of bottom pads arranged separately, wherein the bottom pads are electrically connected to the upper pads via the through holes respectively. The through holes are positioned under the upper pads and the encircling portion of the first metal layer is electrically floating.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A package substrate, comprising:
 a base layer;   a plurality of through holes penetrating through the base layer;   a first metal layer disposed on an upper surface and comprising an encircling portion and a plurality of upper pads arranged separately, wherein the encircling portion surrounds the upper pads to form a trench between the encircling portion and the upper pads, and at least one gap between the upper pads intercommunicates with the trench; and   a second metal layer disposed on the lower surface comprising a plurality of bottom pads arranged separately, wherein the bottom pads are electrically connected to the upper pads via the through holes;   wherein the encircling portion of the first metal layer is electrically floating.   
     
     
         2 . The package substrate according to  claim 1 , wherein the second metal layer further comprises:
 at least one heat dissipation pad corresponding to the upper pads and electrically insulated from the bottom pads.   
     
     
         3 . The package substrate according to  claim 2 , wherein the bottom pads of the second metal layer are divided into an anode region and a cathode region and surround the heat dissipation pad. 
     
     
         4 . The package substrate according to  claim 2 , wherein the heat dissipation pad are electrically floating. 
     
     
         5 . A package structure, comprising:
 a package substrate, comprising:   a base layer;   a plurality of through holes penetrating through the base layer;   a first metal layer disposed on an upper surface and comprising an encircling portion and a plurality of upper pads arranged separately, wherein the encircling portion surrounds the upper pads to form a trench between the encircling portion and the upper pads, and at least one gap between the upper pads intercommunicates with the trench; and   a second metal layer disposed on a lower surface comprising a plurality of bottom pads arranged separately, wherein the bottom pads are electrically connected to the upper pads via the through holes, and the encircling portion of the first metal layer is electrically floating;   at least one chip disposed on the package substrate and electrically connected to the upper pads;   a reflective layer disposed on the package substrate and having a portion filled into the trench, wherein the reflective layer covers the chip and exposes at least a portion of an upper surface of the chip; and   a light transmissive layer covering the exposed portion of the upper surface of the chip.   
     
     
         6 . The package structure according to  claim 5 , wherein the second metal layer further comprising:
 at least one heat dissipation pad corresponding to the chip and electrically insulated from the bottom pads.   
     
     
         7 . The package structure according to  claim 6 , wherein the bottom pads of the second metal layer are divided into an anode region and a cathode region and surround the heat dissipation pad. 
     
     
         8 . The package structure according to  claim 6 , wherein the heat dissipation pad is electrically floating. 
     
     
         9 . The package structure according to  claim 5 , wherein the light transmissive layer comprises a wavelength conversion layer. 
     
     
         10 . The package substrate according to  claim 5 , wherein the reflective layer extends not beyond an outer wall of the trench. 
     
     
         11 . The package structure according to  claim 5 , wherein the package substrate further comprises:
 a plating layer formed on at least one of the first metal layer and the second metal layer, wherein the plating layer is formed of gold or silver.   
     
     
         12 . A package structure, comprising:
 a package substrate, comprising:   a base layer;   a plurality of through holes penetrating through the base layer;   a first metal layer disposed on an upper surface and comprising an encircling portion and a plurality of upper pads arranged separately, wherein the encircling portion surrounds the upper pads to form a trench between the encircling portion and the upper pads, and at least one gap between the upper pads intercommunicates with the trench; and   a second metal layer disposed on a lower surface comprising a plurality of bottom pads arranged separately, wherein the bottom pads are electrically connected to the upper pads via the through holes, and the encircling portion of the first metal layer is electrically floating;   at least one chip disposed on the package substrate and electrically connected to the upper pads;   a reflective layer disposed on the package substrate and having a portion filled into the trench, wherein the reflective layer surrounds a lateral surface of the chip and exposes at least a portion of an upper surface of the chip; and   a light transmissive layer covering the exposed portion of the upper surface of the chip and at least extending between the reflective layer and the lateral surface of the chip.   
     
     
         13 . The package structure according to  claim 12 , wherein the second metal layer further comprising:
 at least one heat dissipation pad corresponding to the chip and electrically insulated from the bottom pads.   
     
     
         14 . The package structure according to  claim 13 , wherein the bottom pads of the second metal layer are divided into an anode region and a cathode region and surround the heat dissipation pad. 
     
     
         15 . The package structure according to  claim 13 , wherein the heat dissipation pad is electrically floating. 
     
     
         16 . The package structure according to  claim 12 , wherein the light transmissive layer comprises a wavelength conversion layer. 
     
     
         17 . The package substrate according to  claim 12 , wherein the reflective layer extends not beyond an outer wall of the trench. 
     
     
         18 . The package structure according to  claim 12 , wherein the package substrate further comprises:
 a plating layer formed on at least one of the first metal layer and the second metal layer; wherein the plating layer is formed of gold or silver.

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