Fin-based devices based on the thermoelectric effect

Abstract

Structures that include semiconductor fins and methods for forming a structure that includes semiconductor fins. A first fin comprised of n-type semiconductor material and a second fin comprised of p-type semiconductor material are formed. A conductive strap is formed that couples an end of the first fin with an end of the second fin.

1 . A structure comprising:
 a substrate;   an integrated circuit including a plurality of device structures on the substrate;   a first fin comprised of n-type semiconductor material, the first fin arranged on the substrate and having an end;   a second fin comprised of p-type semiconductor material, the second fin arranged on the substrate and having an end; and   a conductive strap coupling the end of the first fin with the end of the second fin.   
     
     
         2 . The structure of  claim 1  further comprising:
 a third fin comprised of the n-type semiconductor material, the third fin having an end, 
 wherein the end of the third fin is coupled with the end of the second fin by the conductive strap. 
 
     
     
         3 . The structure of  claim 2  further comprising:
 a fourth fin comprised of the p-type semiconductor material, the fourth fin having an end, 
 wherein the end of the fourth fin is connected with the end of the first fin by the conductive strap. 
 
     
     
         4 . The structure of  claim 1  wherein the first fin is arranged parallel to the second fin, and the conductive strap is arranged transverse to the first fin and the second fin. 
     
     
         5 . The structure of  claim 1  wherein the first fin and the second fin are located on a dielectric layer. 
     
     
         6 . The structure of  claim 1  wherein the first fin is comprised of a plurality of first sections and a plurality of second sections arranged lengthwise in an alternating manner, the n-type semiconductor material of the first sections of the first fin has a first lattice constant, and the n-type semiconductor material of the second sections of the first fin has a second lattice constant that is greater than the first lattice constant. 
     
     
         7 . The structure of  claim 6  wherein the n-type semiconductor material of the first sections is silicon, and the n-type semiconductor material of the second sections is a silicon-germanium alloy. 
     
     
         8 . The structure of  claim 6  wherein the second fin is comprised of a plurality of first sections and a plurality of second sections arranged lengthwise in an alternating manner, the p-type semiconductor material of the first sections of the second fin has a first lattice constant, and the p-type semiconductor material of the second sections of the second fin has a second lattice constant that is greater than the first lattice constant. 
     
     
         9 . The structure of  claim 1  further comprising:
 a substrate; 
 a plurality of first epitaxial layers on the substrate; and 
 a plurality of second epitaxial layers on the substrate, 
 wherein the second epitaxial layers are arranged in an alternating manner with the first epitaxial layers, the first epitaxial layers have a first lattice constant, the second epitaxial layers have a second lattice constant that is greater than the first lattice constant, and the first fin and the second fin are arranged to extend lengthwise across the first epitaxial layers and the second epitaxial layers. 
 
     
     
         10 . The structure of  claim 9  wherein the first epitaxial layers are comprised of silicon, and the second epitaxial layers are comprised of a silicon-germanium alloy. 
     
     
         11 . The structure of  claim 9  further comprising:
 a strain relaxed buffer layer arranged between the substrate and the first epitaxial layer and between the substrate and the second epitaxial layer. 
 
     
     
         12 . The structure of  claim 1  further comprising:
 an external device coupled with the first fin and the second fin. 
 
     
     
         13 . The structure of  claim 12  wherein the external device is configured to receive a current generated by the first fin and the second fin. 
     
     
         14 . The structure of  claim 12  wherein the external device is configured to supply a current to the first fin and the second fin. 
     
     
         15 . A method comprising:
 forming a plurality of device structures of an integrated circuit on a substrate;   forming a first fin comprised of n-type semiconductor material on the substrate;   forming a second fin comprised of p-type semiconductor material on the substrate; and   forming a conductive strap coupling an end of the first fin with an end of the second fin.   
     
     
         16 . The method of  claim 15  further comprising:
 masking a plurality of first sections of the first fin; 
 removing the n-type semiconductor material from a plurality of second sections of the first fin such that the first sections are separated lengthwise by gaps; and 
 epitaxially growing a plurality of sections of an epitaxial semiconductor material to fill the gaps, 
 wherein the n-type semiconductor material of the first sections has a first lattice constant, and the epitaxial semiconductor material of the second sections has a second lattice constant that is greater than the first lattice constant. 
 
     
     
         17 . The method of  claim 16  wherein the n-type semiconductor material of the first sections is comprised of silicon and the epitaxial semiconductor material of the second sections is comprised of silicon-germanium, or the n-type semiconductor material of the first sections is comprised of silicon-germanium and the epitaxial semiconductor material of the second sections is comprised of silicon. 
     
     
         18 . The method of  claim 15  further comprising:
 masking a plurality of first sections of the second fin; 
 removing the n-type semiconductor material from a plurality of second sections of the second fin such that the first sections are separated lengthwise by gaps; and 
 epitaxially growing sections of an epitaxial semiconductor material to fill the gaps, 
 wherein the n-type semiconductor material of the first sections has a first lattice constant, and the epitaxial semiconductor material of the second sections has a second lattice constant that is greater than the first lattice constant. 
 
     
     
         19 . The method of  claim 18  wherein the n-type semiconductor material of the first sections is comprised of silicon and the epitaxial semiconductor material of the second sections is comprised of silicon-germanium, or the n-type semiconductor material of the first sections is comprised of silicon-germanium and the epitaxial semiconductor material of the second sections is comprised of silicon. 
     
     
         20 . The method of  claim 15  further comprising:
 forming a plurality of first epitaxial layers on a substrate; and 
 forming a plurality of second epitaxial layers on the substrate, 
 wherein the second epitaxial layers are arranged in an alternating manner with the first epitaxial layers, the first epitaxial layers have a first lattice constant, the second epitaxial layers have a second lattice constant that is greater than the first lattice constant, and the first fin and the second fin are arranged to extend lengthwise across the first epitaxial layers and the second epitaxial layers.