Methods of direct cooling of packaged devices and structures formed thereby

Abstract

Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures formed herein may include a die disposed on a substrate; a cooling solution comprising a first surface and a second surface opposite the first surface, wherein the second surface is disposed on a backside of the die disposed on a package substrate. A lid comprising an outer surface is disposed on the first surface of the cooling solution, wherein the lid includes a plurality of fins disposed on an inner surface of the lid. A solder is disposed between the outer surface of the lid and the first surface of the cooling solution.

1 - 25 . (canceled) 
     
     
         26 . A microelectronic package structure comprising:
 a die on a substrate;   a cooling solution comprising a first surface and a second surface opposite the first surface, wherein the second surface is on a backside of the die;   a lid comprising an outer surface and an inner surface, wherein a portion of the outer surface is on the first surface of the cooling solution, wherein the inner surface of the lid comprises a first portion and a second portion, opposite the first portion, wherein the first portion of the inner surface is adjacent the portion of the outer surface that is on the first surface of the cooling solution;   a plurality of fins on the first portion of the inner surface of the lid, wherein the second portion of the inner surface is above the plurality of fins; and   a solder material between the portion of the outer surface of the lid that is on the cooling solution and the first surface of the cooling solution.   
     
     
         27 . The microelectronic package structure of  claim 26  wherein the cooling solution comprises support structures, wherein the support structures are attached to the substrate. 
     
     
         28 . The microelectronic package structure of  claim 26  wherein the die comprises a first die, and wherein a second die is adjacent the first die on the substrate. 
     
     
         29 . The microelectronic package structure of  claim 28  wherein the first die and the second die comprise different heights from each other. 
     
     
         30 . The microelectronic package structure of  claim 26  wherein the lid comprises a heat sink, and wherein the cooling solution comprises an integrated heat spreader. 
     
     
         31 . The microelectronic package structure of  claim 26  wherein an inlet port and an outlet port are coupled to the second portion of the outer surface of the lid, wherein a fluid is capable of flowing between the inlet port and the outlet port, wherein the fluid is thermally coupled to the cooling solution, and wherein the first portion of the outer surface of the lid is over the entire length of the first surface of the cooling solution. 
     
     
         32 . The microelectronic package structure of  claim 26  wherein the lid comprises a direct liquid micro jet lid. 
     
     
         33 . The microelectronic package structure of  claim 26  wherein the plurality of fins comprises a plurality of microchannels. 
     
     
         34 . The microelectronic package structure of  claim 26  wherein the die comprises an operating power of at least 200 watts. 
     
     
         35 . The microelectronic package structure of  claim 26  further comprising:
 a system board coupled to the microelectronic package; and 
 a memory connected to the system board. 
 
     
     
         36 . The microelectronic package structure of  claim 35  wherein the system board comprises a portion of a server system. 
     
     
         37 . The microelectronic package structure of  claim 26  wherein the solder material is on an entire length of the first surface of the cooling solution, and wherein the solder material comprises a thickness of between 10 microns to 300 microns. 
     
     
         38 . The microelectronic package structure of  claim 26  wherein the thermal conductivity of the solder material is greater than 15 W/mK. 
     
     
         39 . The microelectronic package structure of  claim 26  wherein the first surface of the cooling solution is free of a thermal interface material. 
     
     
         40 . The microelectronic package structure of  claim 26  wherein the package substrate is free of a lid retention mechanism.