Manufacture method of polysilicon thin film and polysilicon tft structure

Abstract

A polysilicon thin film transistor (TFT) structure includes a substrate, a buffer layer covering the substrate, an island shaped semiconductor layer positioned on the buffer layer, a gate isolation layer covering the island shaped semiconductor layer, a gate positioned on the gate isolation layer, a passivation layer positioned on the gate and the gate isolation layer, and a source and a drain positioned on the passivation layer. The island shaped semiconductor layer is formed with a process that includes forming a polysilicon thin film on the substrate and implementing silicon self-ion implantation to the polysilicon thin film with a dosage and an energy level that prevent the polysilicon thin film from being decrystallized. The silicon self-ion implanted polysilicon thin film is further subjected to photolithography and ion doping to form the island shaped semiconductor layer with ion doping areas.

What is claimed is: 
     
         1 . A polysilicon thin film transistor (TFT) structure, comprising a substrate, a buffer layer covering the substrate, an island shaped semiconductor layer positioned on the buffer layer, a gate isolation layer covering the island shaped semiconductor layer, a gate positioned on the gate isolation layer, a passivation layer positioned on the gate and the gate isolation layer, and a source and a drain positioned on the passivation layer;
 wherein the island shaped semiconductor layer comprises a channel area and a source contact area and a drain contact area respectively positioned at two sides of the channel area, the source being in contact with the source contact area, the drain being in contact with the drain contact area;   wherein the island shaped semiconductor layer is formed with a process that comprises first providing a substrate, forming a polysilicon thin film of a predetermined thickness on a surface of the substrate, and implementing silicon self-ion implantation to the polysilicon thin film, wherein implantation of silicon ions is conducted with a dosage and an energy level that prevent the polysilicon thin film from being decrystallized, the energy level being 15 keV, the silicon self-ion implanted polysilicon thin film being further subjected to photolithography and ion doping to form the island shaped semiconductor layer with ion doping areas, the source contact area and the drain contact area corresponding to the ion doping areas of the silicon self-ion implanted polysilicon thin film, respectively;   wherein the polysilicon TFT structure belongs to a P-type TFT element or a N-type TFT element.   
     
     
         2 . The polysilicon TFT structure according to  claim 1 , wherein a material of each of the gate isolation layer and the passivation layer is silicon oxide, silicon nitride or a combination of the two, and a material of each of the gate, the source and the drain is aluminum. 
     
     
         3 . The polysilicon TFT structure according to  claim 1 , wherein the process further comprises implementing post annealing to the silicon self-ion implanted polysilicon thin film. 
     
     
         4 . The polysilicon TFT structure according to  claim 1 , wherein the substrate comprises a base plate covered with a buffer layer. 
     
     
         5 . The polysilicon TFT structure according to  claim 4 , wherein the base plate comprises one of a silicon plate, a glass plate, and a flexible plate. 
     
     
         6 . The polysilicon TFT structure according to  claim 4 , wherein the buffer layer is made of a material comprising silicon oxide, silicon nitride, or a combination thereof. 
     
     
         7 . The polysilicon TFT structure according to  claim 1 , wherein the polysilicon thin film is formed with direct vapor deposition of a material of polysilicon. 
     
     
         8 . The polysilicon TFT structure according to  claim 1 , wherein the polysilicon thin film is formed with crystallization of amorphous silicon. 
     
     
         9 . The polysilicon TFT structure according to  claim 8 , wherein the crystallization of amorphous silicon is conducted with solid phase crystallization. 
     
     
         10 . The polysilicon TFT structure according to  claim 8 , wherein the crystallization of amorphous silicon is conducted with metal induced crystallization. 
     
     
         11 . The polysilicon TFT structure according to  claim 8 , wherein the crystallization of amorphous silicon is conducted with applying heat to crystallize amorphous silicon through liquid phase crystallization. 
     
     
         12 . The polysilicon TFT structure according to  claim 11 , wherein the heat applied to crystallize amorphous silicon through liquid phase crystallization comprises a light-emitting diode (LED) or a laser device. 
     
     
         13 . The polysilicon TFT substrate according to  claim 3 , wherein the post annealing is carried out with a furnace or a rapid thermal annealing apparatus. 
     
     
         14 . The polysilicon TFT substrate according to  claim 1 , wherein the process comprises depositing a protective layer on the polysilicon thin film before silicon self-ion implantation. 
     
     
         15 . The polysilicon TFT substrate according to  claim 14 , wherein the protective layer is made of a material comprising silicon oxide, silicon nitride, or a combination thereof.