Network-on-chip with fixed and configurable functions

Abstract

Systems and methods are provided herein for providing an NoC including a configurable array of nodes, where a node of the configurable array of nodes operates in a default operating mode until a replacement operating mode is triggered. For example, when an NoC is unconfigured, a latch bank may be initialized to “clear,” such that no routing decisions are stored. This may enable a default operating mode where routing logic updates the latches' values as needed to implement required routing behavior in a dynamic fashion until configuration is performed.

What is claimed is: 
     
         1 . A programmable logic device, comprising:
 a plurality of sub-blocks configured to cause data to be transmitted from a source node of a plurality of nodes to a destination node of the plurality of nodes;   the plurality of nodes coupled to the plurality of sub-blocks;   a first plane coupling at least a first node of the plurality of nodes to at least a second node of the plurality of nodes, wherein the first plane is configured to transmit the data from the source node to the destination node using a first service type; and   a second plane coupling at least the first node of the plurality of nodes to at least the second node of the plurality of nodes, wherein the second plane is configured to transmit the data from the source node to the destination node using a second service type.   
     
     
         2 . The programmable logic device of  claim 1 , wherein the first plane enables utilizing s shared bandwidth connection to transmit the data with variable latency, wherein the second plane enables a provisioned, dedicated connection. 
     
     
         3 . The programmable logic device of  claim 1 , wherein the first plane comprises a master plane and the second plane comprises a slave plane, wherein the master plane is configured to set up the slave plane. 
     
     
         4 . The programmable logic device of  claim 3 , wherein the master plane is configured to set up the slave plane by setting up a virtual circuit between the first node and the second node. 
     
     
         5 . The programmable logic device of  claim 4 , wherein the plurality of nodes comprise a plurality of latches, wherein the master plane is configured to set up the virtual circuit by storing routing decisions associated with the plurality of nodes in the plurality of latches. 
     
     
         6 . The programmable logic device of  claim 1 , comprising routing logic configured to route the data via the first plane and route the data via the second plane. 
     
     
         7 . A method for setting up a virtual circuit on a Network-on-Chip comprising a plurality of nodes, a first plane, and a second plane, wherein the virtual circuit is configured to transmit a data stream via the second plane, wherein the method comprises:
 transmitting a setup packet for the second plane from a first node of the plurality of nodes via the first plane to a second node of the plurality of nodes;   storing routing decisions in intermediate nodes of the plurality of nodes at which the setup packet is received via the second plane en route to the second node;   transmitting the data stream via the second plane from the first node to the second node according to the routing decision stored at in the intermediate nodes.   
     
     
         8 . The method of  claim 7 , wherein the intermediate nodes of the plurality of nodes comprise a plurality of latches, wherein the routing decision stored in the intermediate nodes are stored in the plurality of latches of the intermediate nodes. 
     
     
         9 . The method of  claim 7 , comprising transmitting a teardown packet from the first node to the second node. 
     
     
         10 . The method of  claim 9 , comprising removing the routing decisions stored in the intermediate nodes of the plurality of nodes at which the teardown packet is received en route to the second node. 
     
     
         11 . The method of  claim 9 , wherein the teardown packet is transmitted by the first plane. 
     
     
         12 . The method of  claim 9 , wherein the teardown packet is transmitted by the second plane. 
     
     
         13 . A Network-on-Chip configured to be used in a programmable logic device, comprising:
 a plurality of nodes comprising first routing logic and second routing logic, wherein the first routing logic is configured to route data using a first routing algorithm, and wherein the second routing logic is configured to route the data using a second routing algorithm;   a first plane coupling together the plurality of nodes, wherein the first plane is supported by the first routing logic; and   a second plane coupling together the plurality of nodes, wherein the second plane is supported by the second routing logic.   
     
     
         14 . The Network-on-Chip of  claim 13 , comprising a plurality of node-to-sub-block port interfaces, wherein the plurality of nodes is coupled to a plurality of sub-blocks by the plurality of node-to-sub-block port interfaces. 
     
     
         15 . The Network-on-Chip of  claim 13 , wherein the first routing logic is configured to receive the data, inspect the data, determine a destination node based on the data, and compute a first routing direction for the data based on the first routing algorithm. 
     
     
         16 . The Network-on-Chip of  claim 15 , wherein the second routing logic is configured to receive the data, inspect the data, determine the destination node based on the data, and compute a second routing direction for the data based on the second routing algorithm. 
     
     
         17 . The Network-on-Chip of  claim 16 , wherein the first routing direction and the second routing direction are based on a packet header of the data. 
     
     
         18 . The Network-on-Chip of  claim 16 , wherein the first routing direction and the second routing direction comprise at least one next-hop node of the plurality of nodes en route to the destination node. 
     
     
         19 . The Network-on-Chip of  claim 16 , wherein the plurality of nodes comprises a plurality of channels, wherein the first routing logic is configured to compute a first channel of the plurality of channels to route the data, wherein the second routing logic is configured to compute a second channel of the plurality of channels to route the data. 
     
     
         20 . The Network-on-Chip of  claim 13 , wherein the first plane and the second plane are configured to derive initial routing decisions prior to user configuration of the Network-on-Chip.