Inventor · disambiguated record
Dana How
Also filed as: HOW DANA · HOW DANA L
43 granted patents·5 pending applications·598 citations·filing 1997–2022
98Inventor score
Top patents by PatentIndex Score
48 records- 0196US6613611B1ASIC routing architecture with variable number of custom masksLIGHTSPEED SEMICONDUCTOR CORP·Filed 2000·Granted Sep 2, 2003·125 cites·16 claims
- 0296US6242767B1Asic routing architectureLIGHTSPEED SEMICONDUCTOR CORP·Filed 1997·Granted Jun 5, 2001·172 cites·35 claims
- 0394US10333535B1Techniques for signal skew compensationALTERA CORP·Filed 2016·Granted Jun 25, 2019·11 cites·15 claims
- 0494US9922157B1Sector-based clock routing methods and apparatusALTERA CORP·Filed 2015·Granted Mar 20, 2018·14 cites·27 claims
- 0593US9479456B2Programmable logic device with integrated network-on-chipALTERA CORP·Filed 2013·Granted Oct 25, 2016·15 cites·20 claims
- 0691US9553762B1Network-on-chip with fixed and configurable functionsALTERA CORP·Filed 2014·Granted Jan 24, 2017·11 cites·20 claims
- 0790US6014038AFunction block architecture for gate arrayLIGHTSPEED SEMICONDUCTOR CORP·Filed 1997·Granted Jan 11, 2000·57 cites·42 claims
- 0889US9503057B1Clock grid for integrated circuitALTERA CORP·Filed 2013·Granted Nov 22, 2016·9 cites·28 claims
- 0988US9946826B1Circuit design implementations in secure partitions of an integrated circuitALTERA CORP·Filed 2015·Granted Apr 17, 2018·6 cites·20 claims
- 1088US9606573B1Configurable clock grid structuresALTERA CORP·Filed 2015·Granted Mar 28, 2017·6 cites·25 claims
- 1187US10523207B2Programmable circuit having multiple sectorsALTERA CORP·Filed 2014·Granted Dec 31, 2019·6 cites·18 claims
- 1287US9588176B1Techniques for using scan storage circuitsALTERA CORP·Filed 2015·Granted Mar 7, 2017·9 cites·31 claims
- 1386US9685957B2System reset controller replacing individual asynchronous resetsALTERA CORP·Filed 2014·Granted Jun 20, 2017·8 cites·19 claims
- 1486US9165931B1Apparatus for field-programmable gate array with configurable architecture and associated methodsSCHMIT HERMAN·Filed 2014·Granted Oct 20, 2015·6 cites·20 claims
- 1586US7944236B2High-bandwidth interconnect network for an integrated circuitAGATE LOGIC INC·Filed 2010·Granted May 17, 2011·8 cites·94 claims
- 1686US7557605B2Heterogeneous configurable integrated circuitCSWITCH CORP·Filed 2007·Granted Jul 7, 2009·17 cites·11 claims
- 1785US9501092B1Systems and methods for clock alignment using pipeline stagesALTERA CORP·Filed 2015·Granted Nov 22, 2016·5 cites·24 claims
- 1880US7902862B2High-bandwidth interconnect network for an integrated circuitAGATE LOGIC INC·Filed 2007·Granted Mar 8, 2011·8 cites·21 claims
- 1979US9665677B2Memory controller for heterogeneous configurable integrated circuitAGATE LOGIC INC·Filed 2015·Granted May 30, 2017·3 cites·14 claims
- 2079US6611932B2Method and apparatus for controlling and observing data in a logic block-based ASICLIGHTSPEED SEMICONDUCTOR CORP·Filed 2002·Granted Aug 26, 2003·22 cites·22 claims
- 2176US6223313B1Method and apparatus for controlling and observing data in a logic block-based asicLIGHTSPEED SEMICONDUCTOR CORP·Filed 1997·Granted Apr 24, 2001·38 cites·31 claims
- 2274US9843332B1Clock grid for integrated circuitALTERA CORP·Filed 2017·Granted Dec 12, 2017·1 cites·20 claims
- 2374US9250859B2Deterministic FIFO bufferALTERA CORP·Filed 2014·Granted Feb 2, 2016·3 cites·20 claims
- 2474US9172379B1Efficient controllers and implementations for elastic buffersALTERA CORP·Filed 2014·Granted Oct 27, 2015·3 cites·22 claims
- 2574US6954917B2Function block architecture for gate array and method for forming an asicLIGHTSPEED SEMICONDUCTOR CORP·Filed 2003·Granted Oct 11, 2005·15 cites·7 claims
- 2672US9385717B1Level-sensitive two-phase single-wire latch controllers without contentionALTERA CORP·Filed 2014·Granted Jul 5, 2016·2 cites·18 claims
- 2771US9071246B2Memory controller for heterogeneous configurable integrated circuitsSUBRAMANIAM SURESH·Filed 2007·Granted Jun 30, 2015·7 cites·19 claims
- 2869US10367745B1Network-on-chip with fixed and configurable functionsALTERA CORP·Filed 2016·Granted Jul 30, 2019·1 cites·11 claims
- 2969US2022224656A1Programmable logic device with integrated network-on-chipALTERA CORP·Filed 2022·Application pending·0 cites
- 3065US10591544B2Programmable integrated circuits with in-operation reconfiguration capabilityALTERA CORP·Filed 2018·Granted Mar 17, 2020·0 cites·20 claims
- 3164US2019215280A1Programmable logic device with integrated network-on-chipALTERA CORP·Filed 2019·Application pending·0 cites
- 3259US2019327176A1Network-on-chip with fixed and configurable functionsALTERA CORP·Filed 2019·Application pending·0 cites
- 3357US10367756B2Programmable logic device with integrated network-on-chipALTERA CORP·Filed 2016·Granted Jul 30, 2019·0 cites·20 claims
- 3457US9660630B1Clock grid for integrated circuitALTERA CORP·Filed 2016·Granted May 23, 2017·0 cites·20 claims
- 3557US2020136624A1Programmable Circuit Having Multiple SectorsALTERA CORP·Filed 2019·Application pending·0 cites
- 3656US6690194B1Function block architecture for gate arrayLIGHTSPEED SEMICONDUCTOR CORP·Filed 1999·Granted Feb 10, 2004·10 cites·14 claims
- 3754US10044344B2Systems and methods for a low hold-time sequential input stageALTERA CORP·Filed 2017·Granted Aug 7, 2018·0 cites·20 claims
- 3853US9960903B1Systems and methods for clock alignment using pipeline stagesALTERA CORP·Filed 2016·Granted May 1, 2018·0 cites·17 claims
- 3952US10523224B2Techniques for signal skew compensationALTERA CORP·Filed 2019·Granted Dec 31, 2019·0 cites·20 claims
- 4051US10082541B2Mixed redundancy scheme for inter-die interconnects in a multichip packageALTERA CORP·Filed 2015·Granted Sep 25, 2018·0 cites·20 claims
- 4150US9806696B1Systems and methods for a low hold-time sequential input stageALTERA CORP·Filed 2015·Granted Oct 31, 2017·0 cites·19 claims
- 4250US9698784B1Level-sensitive two-phase single-wire latch controllers without contentionALTERA CORP·Filed 2016·Granted Jul 4, 2017·0 cites·20 claims
- 4349US8405418B1High-bandwidth interconnect network for an integrated circuitHOW DANA·Filed 2011·Granted Mar 26, 2013·0 cites·29 claims
- 4447US11749368B2Quick configurable universal register for a configurable integrated circuit dieINTEL CORP·Filed 2019·Granted Sep 5, 2023·0 cites·20 claims
- 4547US9602587B2Multiple plane network-on-chip with master/slave inter-relationshipsALTERA CORP·Filed 2014·Granted Mar 21, 2017·0 cites·17 claims
- 4642US2017249412A1Memory Controller For Heterogeneous Configurable Integrated CircuitSUBRAMANIAN SURESH·Filed 2017·Application pending·0 cites
- 4736US10210919B2Integrated circuits with embedded double-clocked componentsALTERA CORP·Filed 2015·Granted Feb 19, 2019·0 cites·17 claims
- 4834US9703526B2Self-stuffing multi-clock FIFO requiring no synchronizersALTERA CORP·Filed 2015·Granted Jul 11, 2017·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →