Correlated electron switch programmable fabric

Abstract

Subject matter disclosed herein may relate to programmable fabrics including correlated electron switch devices.

1 - 23 . (canceled) 
     
     
         24 . A method, comprising:
 configuring a programmable fabric of an integrated circuit device at least in part by selectively providing a particular lower impedance path between a first particular electrically conductive line of a first metallization layer of the programmable fabric and a second particular electrically conductive line of a second metallization layer of the programmable fabric at least in part by placing two or more particular correlated electron switch devices in a particular impedance state, wherein the particular lower impedance path includes at least a third particular electrically conductive line of a third metallization layer of the programmable fabric.   
     
     
         25 . The method of  claim 24 , wherein the placing the two or more particular correlated electron switch devices in the particular impedance state comprises limiting a current flow through the two or more particular correlated electron switch devices to a specified threshold current level at least in part to establish a particular threshold current density in the two or more particular correlated electron switch devices for a subsequent operation to place the two or more particular correlated electron switch devices in a second impedance state. 
     
     
         26 . The method of  claim 24 , wherein the programmable fabric comprises a cross-point array, wherein the first metallization layer includes a first plurality of electrically conductive lines oriented approximately parallel with each other, wherein the third metallization layer includes a third plurality of electrically conductive lines oriented approximately parallel with each other, and wherein the first plurality of electrically conductive lines are oriented approximately orthogonally to the third plurality of electrically conductive lines. 
     
     
         27 . The method of  claim 26 , wherein the second metallization layer includes a second plurality of electrically conductive lines oriented approximately parallel with each other, and wherein the second plurality of electrically conductive lines are oriented approximately orthogonally to the third plurality of electrically conductive lines. 
     
     
         28 . The method of  claim 27 , wherein at least one of the two or more correlated electron switch devices is positioned between the first particular electrically conductive line of the first metallization layer and the third particular electrically conductive line of the third metallization layer and wherein at least one other of the two or more correlated electron switch devices is positioned between the second particular electrically conductive line of the second metallization layer and the third particular electrically conductive line of the third metallization layer. 
     
     
         29 . The method of  claim 24 , wherein the configuring the programmable fabric of the integrated circuit device includes selectively connecting or disconnecting one or more portions of the integrated circuit to or from one or more other portions of the integrated circuit. 
     
     
         30 . The method of  claim 29 , wherein the selectively connecting or disconnecting the one or more portions of the integrated circuit to or from the one or more other portions of the integrated circuit comprises selectively disconnecting a first portion of the integrated circuit from a second portion of the integrated circuit and selectively connecting the first portion of the integrated circuit to a third portion of the integrated circuit. 
     
     
         31 . The method of  claim 29 , wherein the selectively connecting or disconnecting the one or more portions of the integrated circuit to or from the one or more other portions of the integrated circuit includes compensating for design errors or manufacturing errors, or a combination thereof, in the integrated circuit. 
     
     
         32 . The method of  claim 29 , wherein the selectively connecting or disconnecting the one or more portions of the integrated circuit to or from the one or more other portions of the integrated circuit comprises reducing power consumption in the integrated circuit at least in part by selectively disconnecting a supply voltage from the one or more portions of the integrated circuit. 
     
     
         33 . An integrated circuit device, comprising:
 a programmable fabric to include a first metallization layer, a second metallization layer, and a third metallization layer; and   two or more correlated electron switch devices to be positioned within the programmable fabric; and   a write circuit to selectively provide a particular lower impedance path between a first particular electrically conductive line of the first metallization layer and a second particular electrically conductive line of the second metallization layer at least in part via an operation to place the two or more particular correlated electron switch devices in a particular impedance state, wherein the particular lower impedance path includes at least a third particular electrically conductive line of the third metallization layer.   
     
     
         34 . The integrated circuit device of  claim 33 , wherein the write circuit to place the two or more particular correlated electron switch devices in the particular impedance state at least in part via limitation of current flow through the two or more particular correlated electron switch devices to a specified threshold current level at least in part to establish a particular threshold current density in the two or more particular correlated electron switch devices for a subsequent operation to place the two or more particular correlated electron switch devices in a second impedance state. 
     
     
         35 . The integrated circuit device of  claim 33 , wherein the integrated circuit device to include a plurality of portions of an integrated circuit. 
     
     
         36 . The integrated circuit device of  claim 35 , wherein the write circuit to selectively connect or disconnect one or more of the plurality of portions of the integrated circuit to or from one or more other of the plurality of portions of the integrated circuit at least in part via the operation to place the two or more particular correlated electron switch devices in the particular impedance state. 
     
     
         37 . The integrated circuit device of  claim 36 , wherein the write circuit to selectively connect or disconnect the one or more of the plurality of portions of the integrated circuit to or from the one or more other of the plurality of portions of the integrated circuit at least in part to compensate for design errors or manufacturing errors, or a combination thereof, in the integrated circuit device. 
     
     
         38 . The integrated circuit device of  claim 36 , wherein the write circuit to selectively connect or disconnect the one or more of the plurality of portions of the integrated circuit to or from the one or more other of the plurality of portions of the integrated circuit at least in part to reduce power consumption in the integrated circuit at least in part by selectively disconnecting a supply voltage from at least one of the plurality of portions of the integrated circuit. 
     
     
         39 . The integrated circuit device of  claim 33 , wherein the programmable fabric to comprise a cross-point array, wherein the first metallization layer to include a first plurality of electrically conductive lines to be oriented approximately parallel with each other, wherein the third metallization layer to include a third plurality of electrically conductive lines to be oriented approximately parallel with each other, and wherein the first plurality of electrically conductive lines are to be oriented approximately orthogonally to the third plurality of electrically conductive lines. 
     
     
         40 . The integrated circuit device of  claim 39 , wherein the second metallization layer to include a second plurality of electrically conductive lines to be oriented approximately parallel with each other, and where in the second plurality of electrically conductive lines are to be oriented approximately orthogonally to the third plurality of electrically conductive lines. 
     
     
         41 . The integrated circuit device of  claim 40 , wherein at least one of the two or more correlated electron switch devices is to be positioned between the first particular electrically conductive line of the first metallization layer and the third particular electrically conductive line of the third metallization layer and wherein at least one other of the two or more correlated electron switch devices is to be positioned between the second particular electrically conductive line of the second metallization layer and the third particular electrically conductive line of the third metallization layer. 
     
     
         42 . An integrated circuit device, comprising:
 a programmable fabric to include a first metallization layer, a second metallization layer, and a third metallization layer;   one or more source regions or drain regions, or a combination thereof, of the integrated circuit device;   two or more correlated electron switch devices to be positioned within the programmable fabric and at least a third correlated electron switch device to be electrically connected between one or more electrically conductive lines of the third metallization layer and the one or more source or drain regions, or the combination thereof; and   a write circuit to selectively provide a particular lower impedance path between one or more electrically conductive lines of the first metallization layer and the one or more source regions or drain regions, or the combination thereof, at least in part via an operation to place the two or more particular correlated electron switch devices to be positioned within the programmable fabric and the at least the third correlated electron switch device in a particular impedance state, wherein the particular lower impedance path to include at least a second electrically conductive line of the second metallization layer and the one or more electrically conductive lines of the third metallization layer.   
     
     
         43 . The integrated circuit device of  claim 42 , wherein the write circuit to place the two or more particular correlated electron switch devices to be positioned within the programmable fabric and the at least the third correlated electron switch device in the particular impedance state at least in part via limitation of current flow through the two or more particular correlated electron switch devices to be positioned within the programmable fabric and the at least the third correlated electron switch device to a specified threshold current level at least in part to establish a particular threshold current density in the two or more particular correlated electron switch devices to be positioned within the programmable fabric and the at least the third correlated electron switch device for a subsequent operation to place the two or more particular correlated electron switch devices to be positioned within the programmable fabric and the at least the third correlated electron switch device in a second impedance state.