Semiconductor memory device

Abstract

A semiconductor memory device includes a plurality of electrode layers stacked above a first semiconductor layer, a second semiconductor layer and a first film. The second semiconductor layer extends through the plurality of electrode layers in a stacking direction of the plurality of electrode layers. The second semiconductor layer includes an end portion inside the first semiconductor layer. The first film is positioned inside the first semiconductor layer and contacts the first semiconductor layer. The first semiconductor layer includes a first portion, a second portion, and a third portion. The first film is positioned between the first portion and the second portion. The third portion links the first portion and the second portion. The third portion is positioned between the first film and the second semiconductor layer. The second semiconductor layer includes a contact portion contacting the third portion of the first semiconductor layer.

What is claimed is: 
     
         1 . A semiconductor memory device, comprising:
 a plurality of electrode layers stacked above a first semiconductor layer;   a second semiconductor layer extending through the plurality of electrode layers in a stacking direction of the plurality of electrode layers, the second semiconductor layer including an end portion inside the first semiconductor layer; and   a first film positioned inside the first semiconductor layer and contacting the first semiconductor layer,   the first semiconductor layer including a first portion, a second portion, and a third portion, the first film being positioned between the first portion and the second portion, the third portion linking the first portion and the second portion, the third portion being positioned between the first film and the second semiconductor layer,   the second semiconductor layer including a contact portion contacting the third portion of the first semiconductor layer.   
     
     
         2 . The device according to  claim 1 , wherein the first film is an insulating film. 
     
     
         3 . The device according to  claim 1 , wherein the first film is a metal film. 
     
     
         4 . The device according to  claim 1 , wherein
 the first semiconductor layer has a void, and   the first film is provided in the void and contacts the first semiconductor layer.   
     
     
         5 . The device according to  claim 1 , further comprising:
 a second film extending in the stacking direction along the second semiconductor layer, the second film electrically insulating the second semiconductor layer from the plurality of electrode layers,   the second film including a first portion and a second portion separated from the first portion, the first portion covering the end portion of the second semiconductor layer,   the first semiconductor layer being connected to the contact portion of the second semiconductor layer between the first portion of the second film and the second portion of the second film.   
     
     
         6 . The device according to  claim 1 , wherein
 the first film has a multilayer structure including a first layer and a second layer,   the first layer contacts the first semiconductor layer, and   the second layer includes a material different from a material of the first layer.   
     
     
         7 . The device according to  claim 1 , further comprising:
 an insulating core extending in the stacking direction, the insulating core being positioned inside the second semiconductor layer,   the second semiconductor layer including a first portion positioned between the insulating core and the plurality of electrode layers,   the second semiconductor layer including a second portion positioned inside the first semiconductor layer, the insulating core not including a portion positioned in the second portion of the second semiconductor layer.   
     
     
         8 . The device according to  claim 1 , wherein the first semiconductor layer includes at least one of phosphorus (P), boron (B), or carbon (C) as an impurity. 
     
     
         9 . The device according to  claim 1 , wherein the second film includes a charge storage portion positioned between the second semiconductor layer and at least one of the plurality of electrode layers. 
     
     
         10 . A semiconductor memory device, comprising:
 a source layer including a first semiconductor layer;   a bit line positioned above the source layer;   a plurality of word lines stacked between the source layer and the bit line;   a second semiconductor layer extending through the plurality of word lines and including a first end portion and a second end portion, the first end portion being positioned inside the source layer, the second end portion being electrically connected to the bit line;   a first film positioned inside the first semiconductor layer, the first film contacting the first semiconductor layer; and   a second film electrically insulating the second semiconductor layer from the plurality of word lines,   the second film including a charge storage portion positioned between the second semiconductor layer and each of the plurality of word lines,   the first semiconductor layer including a first portion, a second portion, and a third portion, the first film being positioned between the first portion and the second portion, the third portion linking the first portion and the second portion, the third portion being positioned between the first film and the second semiconductor layer,   the second semiconductor layer being electrically connected to the third portion of the first semiconductor layer.   
     
     
         11 . The device according to  claim 10 , wherein the first film is an insulating film. 
     
     
         12 . The device according to  claim 10 , wherein the first film is a metal film. 
     
     
         13 . The device according to  claim 10 , wherein
 the second film includes a first portion and a second portion separated from the first portion, the first portion covering a first end portion of the second semiconductor layer, and   the third portion of the first semiconductor layer surrounds the second semiconductor layer between the first portion of the second film and the second portion of the second film.   
     
     
         14 . The device according to  claim 13 , wherein
 the second semiconductor layer is provided in a plurality,   the first semiconductor layer has a void between a plurality of the third portions of the first semiconductor layer, the plurality of the third portions of the first semiconductor layer surrounding the plurality of second semiconductor layers, respectively, and   the first film is provided in the void and contacts the first semiconductor layer.   
     
     
         15 . A semiconductor memory device, comprising:
 a source layer including a first semiconductor layer;   a bit line positioned above the source layer;   a plurality of word lines stacked between the source layer and the bit line;   a second semiconductor layer extending through the plurality of word lines, the second semiconductor layer including a first end portion and a second end portion, the first end portion being positioned inside the source layer, the second end portion being electrically connected to the bit line;   a first film positioned inside the first semiconductor layer, the first film contacting the first semiconductor layer; and   a second film provided between the second semiconductor layer and the plurality of word lines, the second film electrically insulating the second semiconductor layer from the plurality of word lines,   the second film including a first portion and a second portion separated from the first portion, the first portion covering the first end portion of the second semiconductor layer,   the first semiconductor layer including a contact portion surrounding the second semiconductor layers between the first portion of the second film and the second portion of the second film, the first semiconductor layer being electrically connected to the second semiconductor layer, wherein   the second semiconductor layer and the contact portion of the first semiconductor layer are provided respectively in a plurality, and   the first semiconductor layer includes a void between the plurality of contact portions, the first film being provided in the void and contacting the first semiconductor layer.   
     
     
         16 . The device according to  claim 15 , wherein the first film covers an inner surface of the void. 
     
     
         17 . The device according to  claim 15 , wherein the first film includes the void. 
     
     
         18 . The device according to  claim 15 , wherein the second film includes a charge storage portion positioned between the second semiconductor layer and each of the plurality of word lines.