Structure of 3d nand memory device and method of forming the same

Abstract

A structure of 3D NAND memory device and manufacturing method are provided. The structure of 3D NAND memory device includes a substrate, a first stack layer on the substrate, a second stack layer on the first stack layer, a block layer between the first stack layer and the second stack layer, and a channel structure extending through the first stack layer, the block layer and the second stack layer, wherein the channel structure comprises a function layer and a channel layer surrounding by the functional layer.

1 : A structure of 3D NAND memory device, comprising:
 a substrate;   a first stack layer on said substrate;   a second stack layer on said first stack layer;   a block layer between said first stack layer and said second stack layer; and   a channel structure extending through said first stack layer, said block layer and said second stack layer, wherein said channel structure comprises a function layer and a channel layer surrounded by said functional layer.   
     
     
         2 : The structure of 3D NAND memory device of  claim 1 , wherein said first stack layer and said second stack layer comprises multiple oxide/metal layer pairs. 
     
     
         3 : The structure of 3D NAND memory device of  claim 1 , wherein said functional layer comprises a barrier layer, a charge trapping layer and a tunneling layer. 
     
     
         4 : The structure of 3D NAND memory device of  claim 1 , further comprising:
 a first channel hole extending through said first stack layer;   a second channel hole extending through said second stack layer; and   an opening through said block layer;   wherein said channel structure is in said first channel hole, said opening and said second channel hole, and at least a portion of a sidewall of said opening is aligned with a sidewall of said second channel hole.   
     
     
         5 : The structure of 3D NAND memory device of  claim 4 , wherein said first channel hole and said second channel hole are completely overlapped, and entire said sidewall of said opening is aligned with said sidewall of said second channel hole. 
     
     
         6 : The structure of 3D NAND memory device of  claim 4 , wherein said first channel hole and said second channel hole are partially overlapped, and a portion of said sidewall of said opening is aligned with said sidewall of said second channel hole. 
     
     
         7 : The structure of 3D NAND memory device of  claim 4 , further comprising a filling dielectrics on said channel layer and filling up said first channel hole, said opening and said second channel hole. 
     
     
         8 : The structure of 3D NAND memory device of  claim 1 , wherein a ratio of etch rate selectivity of said block layer to a silicon oxide layer is lower than 1:100, and a ratio of etch rate selectivity of said block layer to a silicon nitride layer is lower than 1:100. 
     
     
         9 : The structure of 3D NAND memory device of  claim 1 , wherein said block layer is metal layer. 
     
     
         10 : The structure of 3D NAND memory device of  claim 1 , wherein a material of said block layer comprises titanium nitride (TiN) or tungsten (W). 
     
     
         11 : The structure of 3D NAND memory device of  claim 1 , further comprising an epitaxial structure on said substrate at a bottom of said first channel hole. 
     
     
         12 - 20 . (canceled)