Semiconductor device with reduced floating body effects and fabrication method thereof

Abstract

An SOI semiconductor device includes a substrate, a buried oxide layer disposed on the substrate, a top semiconductor layer disposed on the buried oxide layer, a source doping region and a drain doping region in the top semiconductor layer, a channel region between the source doping region and the drain doping region in the top semiconductor layer, a gate electrode on the channel region, and an embedded doping region disposed in the top semiconductor layer and directly under the channel region. The embedded doping region acts as a hole sink to alleviate or avoid floating body effects.

What is claimed is: 
     
         1 . A semiconductor device with reduced floating body effects, comprising:
 a substrate;   a buried oxide layer disposed on the substrate;   a top semiconductor layer of a first conductivity type disposed on the buried oxide layer;   a source doping region of a second conductivity type in the top semiconductor layer;   a drain doping region of the second conductivity type in the top semiconductor layer;   a channel region between the source doping region and the drain doping region in the top semiconductor layer;   a gate electrode on the channel region; and   an embedded region of the first conductivity type disposed in the top semiconductor layer and directly under the channel region.   
     
     
         2 . The semiconductor device with reduced floating body effects according to  claim 1 , wherein the channel region is disposed within an ion well of the first conductivity type. 
     
     
         3 . The semiconductor device with reduced floating body effects according to  claim 2 , wherein the embedded region of the first conductivity type is disposed at a bottom of the ion well of the first conductivity type. 
     
     
         4 . The semiconductor device with reduced floating body effects according to  claim 3 , wherein the embedded region of the first conductivity type is adjoined to an upper surface of the buried oxide layer. 
     
     
         5 . The semiconductor device with reduced floating body effects according to  claim 2 , wherein the embedded region of the first conductivity type has a doping concentration that is greater than that of the ion well of the first conductivity type. 
     
     
         6 . The semiconductor device with reduced floating body effects according to  claim 5 , wherein the doping concentration of the embedded region of the first conductivity type ranges between 1E15 and 1E16 atoms/cm 3 , and the doping concentration of the ion well of the first conductivity type ranges between 1E13 and 1E15 atoms/cm 3 . 
     
     
         7 . The semiconductor device with reduced floating body effects according to  claim 1 , wherein the embedded region of the first conductivity type has a thickness that is smaller than or equal to one third of a thickness of the top semiconductor layer. 
     
     
         8 . The semiconductor device with reduced floating body effects according to  claim 1 , wherein the first conductivity type is P type and the second conductivity type is N type. 
     
     
         9 . The semiconductor device with reduced floating body effects according to  claim 1 , wherein the embedded region of the first conductivity type is contiguous with the source doping region and the drain doping region. 
     
     
         10 . The semiconductor device with reduced floating body effects according to  claim 1 , wherein the embedded region of the first conductivity type is spaced apart from the source doping region and the drain doping region. 
     
     
         11 . A method for forming a semiconductor structure, comprising:
 providing a silicon-on-insulator (SOI) substrate comprising a substrate, a buried oxide layer disposed on the substrate, and a top semiconductor layer of a first conductivity type disposed on the buried oxide layer;   forming an embedded region of the first conductivity type in the top semiconductor layer;   forming a gate electrode on the top semiconductor layer; and   forming a source doping region of a second conductivity type and a drain doping region of the second conductivity type in the top semiconductor layer.   
     
     
         12 . The method according to  claim 11 , wherein the channel region is disposed within an ion well of the first conductivity type. 
     
     
         13 . The method according to  claim 12 , wherein the embedded region of the first conductivity type is disposed at a bottom of the ion well of the first conductivity type. 
     
     
         14 . The method according to  claim 13 , wherein the embedded region of the first conductivity type is adjoined to an upper surface of the buried oxide layer. 
     
     
         15 . The method according to  claim 12 , wherein the embedded region of the first conductivity type has a doping concentration that is greater than that of the ion well of the first conductivity type. 
     
     
         16 . The method according to  claim 15 , wherein the doping concentration of the embedded region of the first conductivity type ranges between 1E15 and 1E16 atoms/cm 3 , and the doping concentration of the ion well of the first conductivity type ranges between 1E13 and 1E15 atoms/cm 3 . 
     
     
         17 . The method according to  claim 11 , wherein the embedded region of the first conductivity type has a thickness that is smaller than or equal to one third of a thickness of the top semiconductor layer. 
     
     
         18 . The method according to  claim 11 , wherein the first conductivity type is P type and the second conductivity type is N type. 
     
     
         19 . The method according to  claim 11 , wherein the embedded region of the first conductivity type is contiguous with the source doping region and the drain doping region. 
     
     
         20 . The method according to  claim 11 , wherein the embedded region of the first conductivity type is spaced apart from the source doping region and the drain doping region.