Semiconductor apparatus and manufacturing method for same

Abstract

The present disclosure relates to the field of semiconductor technologies, and discloses semiconductor apparatus and manufacturing methods for the same. In some implementations, a method may include: providing a substrate structure which includes: a substrate, one or more fins located on the substrate and extending along a first direction, and an isolation region located around one of the fins, an upper surface of the isolation region being lower than an upper surface of the fin, the isolation region including a first isolation region and a second isolation region, where the first isolation region is located on a side surface of the fin that is in the first direction, and the second isolation region is located on a side surface of the fin that is in a second direction that is different from the first direction; forming, on the substrate structure, a sacrificial layer having an opening, the opening exposing an upper surface of the first isolation region and exposing a part, which is located above the first isolation region, of the side surfaces of the fin adjacent to the first isolation region; filling the opening with an insulating material to form a third isolation region on the first isolation region, an upper surface of the third isolation region being higher than the upper surface of the fin; and removing the sacrificial layer.

What is claimed is: 
     
         1 . A semiconductor apparatus, comprising:
 a substrate;   a fin located on the substrate and extending along a first direction; and   an isolation region located around the fin, where an upper surface of the isolation region is lower than an upper surface of the fin, the isolation region comprising:
 a first isolation region located on a side surface of the fin that is in the first direction, and 
 a second isolation region located on a side surface of the fin that is in a second direction that is different from the first direction; and 
   a third isolation region located on the first isolation region, where an upper surface of the third isolation region is higher than the upper surface of the fin.   
     
     
         2 . The apparatus according to  claim 1 , wherein:
 the third isolation region covers an end portion of the fin adjacent to the first isolation region.   
     
     
         3 . The apparatus according to  claim 1 , further comprising:
 a protection layer between the third isolation region and the fin.   
     
     
         4 . The apparatus according to  claim 1 , further comprising:
 a first gate structure on the fin, and   a second gate structure on the third isolation region.   
     
     
         5 . The apparatus according to  claim 4 , further comprising:
 a source region and a drain region that are formed by means of epitaxial growth of a semiconductor material on both sides of the first gate structure.   
     
     
         6 . The apparatus according to  claim 4 , wherein:
 the first gate structure comprises a first gate dielectric layer on the surface of the fin, a first gate on the first gate dielectric layer, a first hard mask layer on the first gate, and a first spacer on side walls of the first gate dielectric layer, the first gate and the first hard mask layer; and   the second gate structure comprises a second gate on the third isolation region, a second hard mask layer on the second gate, and a second spacer on side walls of the second gate and the second hard mask layer, the second spacer covering the end portion of the fin adjacent to the third isolation region.