Semiconductor package

Abstract

A semiconductor package includes a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposite to the active surface, a heat-dissipating member, including graphite, which is disposed on the inactive surface of the semiconductor chip; an encapsulant sealing at least a portion of each of the semiconductor chip and the heat-dissipating member, and a connection structure, which includes a redistribution layer electrically connected to the connection pad, disposed on the active surface of the semiconductor chip, and at least a side surface of the heat-dissipating member is coplanar with a side surface of the semiconductor chip.

What is claimed is: 
     
         1 . A semiconductor package, comprising:
 a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposite to the active surface;   a heat-dissipating member, which includes graphite, disposed on the inactive surface of the semiconductor chip;   an encapsulant sealing at least a portion of each of the semiconductor chip and the heat-dissipating member; and   a connection structure, which includes a redistribution layer electrically connected to the connection pad, disposed on the active surface of the semiconductor chip,   wherein at least a side surface of the heat-dissipating member is coplanar with a side surface of the semiconductor chip.   
     
     
         2 . The semiconductor package of  claim 1 , wherein the encapsulant covers the entirety of an upper surface of the heat-dissipating member. 
     
     
         3 . The semiconductor package of  claim 1 , wherein the heat-dissipating member includes holes passing through at least a portion of the heat-dissipating member. 
     
     
         4 . The semiconductor package of  claim 3 , wherein the encapsulant fills the holes. 
     
     
         5 . The semiconductor package of  claim 3 , further comprising a filling metal layer filling the holes. 
     
     
         6 . The semiconductor package of  claim 1 , further comprising a capping metal layer disposed between the heat-dissipating member and the encapsulant. 
     
     
         7 . The semiconductor package of  claim 6 , wherein the capping metal layer covers a lower surface of the heat-dissipating member facing the semiconductor chip. 
     
     
         8 . The semiconductor package of  claim 6 , wherein the heat-dissipating member includes holes passing through at least a portion of the heat-dissipating member, the capping metal layer is extended to an inner side wall of the holes, and the encapsulant fills the holes. 
     
     
         9 . The semiconductor package of  claim 1 , further comprising a frame having a through-hole,
 wherein the semiconductor chip and the heat-dissipating member are disposed in the through-hole of the frame.   
     
     
         10 . The semiconductor package of  claim 1 , wherein a thickness of the heat-dissipating member is less than a thickness of the semiconductor chip. 
     
     
         11 . The semiconductor package of  claim 1 , wherein the heat-dissipating member has the same size as a size of the semiconductor chip on a plane. 
     
     
         12 . The semiconductor package of  claim 1 , further comprising an adhesive layer interposed between the heat-dissipating member and the semiconductor chip. 
     
     
         13 . The semiconductor package of  claim 1 , wherein the heat-dissipating member is directly bonded to the inactive surface of the semiconductor chip. 
     
     
         14 . The semiconductor package of  claim 1 , further comprising:
 a backside redistribution layer disposed on the encapsulant; and   a heat-dissipating via passing through the encapsulant, and connecting the backside redistribution layer to the heat-dissipating member.   
     
     
         15 . A semiconductor package, comprising:
 a frame having a through-hole;   a semiconductor chip disposed in the through-hole, and having an active surface on which a connection pad is disposed and an inactive surface opposite to the active surface;   a heat-dissipating member, which includes graphite, disposed on the inactive surface of the semiconductor chip in the through-hole;   an encapsulant covering at least a portion of the semiconductor chip and at least a portion of an upper surface the heat-dissipating member heat-dissipating; and   a connection structure, including a redistribution layer electrically connected to the connection pad, disposed on the active surface of the semiconductor chip.   
     
     
         16 . The semiconductor package of  claim 15 , wherein the encapsulant covers the upper surface and four side surfaces of the heat-dissipating member. 
     
     
         17 . The semiconductor package of  claim 1 , wherein the heat-dissipating member includes pyrolytic graphite. 
     
     
         18 . The semiconductor package of  claim 1 , wherein a thickness of the heat-dissipating member is in a range of 20 μm to 100 μm.