US2020220033A1PendingUtilityA1

Metal-assisted etch combined with regularizing etch

59
Assignee: ADVANCED SILICON GROUP INCPriority: Sep 10, 2013Filed: Mar 13, 2020Published: Jul 9, 2020
Est. expirySep 10, 2033(~7.2 yrs left)· nominal 20-yr term from priority
H10P 50/642H10F 77/70H10F 71/121H10F 77/707Y02E10/547Y02E10/50B82Y 40/00H01L 21/30604H01L 31/1804H01L 31/0236H01L 31/02366
59
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A silicon-containing substrate including a top surface which comprises nanostructuring having a plurality of rounded depressions with depths greater than 20 nm.

Claims

exact text as granted — not AI-modified
1 . A silicon-containing substrate having a top surface which comprises nanostructuring having a plurality of rounded depressions with depths greater than 20 nm. 
     
     
         2 . The substrate of  claim 1 , comprising polycrystalline silicon. 
     
     
         3 . The substrate of  claim 2 , wherein the nanostructuring was formed through a metal-assisted chemical etching. 
     
     
         4 . The substrate of  claim 3 , wherein a plurality of the rounded depressions have depths greater than 50 nm. 
     
     
         5 . The substrate of  claim 4 , further comprising at least one screen printed contact. 
     
     
         6 . The substrate of  claim 4 , wherein a plurality of the rounded depressions have depths greater than 100 nm. 
     
     
         7 . The substrate of  claim 6 , further comprising at least one screen printed contact. 
     
     
         8 . The substrate of  claim 6 , further comprising residual metal deposits in at least some of the rounded depressions. 
     
     
         9 . The substrate of  claim 4 , further comprising residual metal deposits in at least some of the rounded depressions. 
     
     
         10 . The substrate of  claim 3 , further comprising a p-n junction, wherein a plurality of the depressions have depths greater than 100 nm. 
     
     
         11 . The substrate of  claim 10 , wherein the p-n junction is a diffused p-n junction. 
     
     
         12 . The substrate of  claim 11 , wherein the p-n junction is below the plurality of rounded depressions. 
     
     
         13 . The substrate of  claim 12 , wherein the rounded depressions have a density on the substrate of at least 10 per square micron. 
     
     
         14 . The substrate of  claim 12 , wherein the rounded depressions have a density on the substrate of at least 20 per square micron. 
     
     
         15 . The substrate of  claim 12 , wherein the substrate has at least one region measuring 1 micron by 1 micron with at least 10 rounded depressions. 
     
     
         16 . The substrate of  claim 15 , wherein the substrate has at least one region measuring 1 micron by 1 micron with at least 20 rounded depressions. 
     
     
         17 . The substrate of  claim 15 , further comprising a SiN passivation layer in contact with the nanostructuring. 
     
     
         18 . The substrate of  claim 17 , further comprising residual metal deposits in at least some of the rounded depressions. 
     
     
         19 . The substrate of  claim 18 , wherein the residual metal deposits comprise Ag. 
     
     
         20 . The substrate of  claim 12 , further comprising residual metal deposits in at least some of the rounded depressions. 
     
     
         21 . The substrate of  claim 20 , further comprising at least one screen printed contact. 
     
     
         22 . The substrate of  claim 21 , further comprising a rear contact. 
     
     
         23 . The substrate of  claim 20 , where the residual metal deposits comprise Ag.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.