Circuit structure and method of manufacturing the same

Abstract

Provided is a circuit structure including a substrate, a pad, a dielectric layer, a conductive layer, an adhesion layer, and a conductive bump. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The conductive layer contacts the pad and extends from the pad to cover a top surface of the dielectric layer. The adhesion layer is disposed between the dielectric layer and the conductive layer. The conductive bump extends in an upward manner from a top surface of the conductive layer. The conductive bump and the conductive layer are integrally formed. A method of manufacturing the circuit structure is also provided.

What is claimed is: 
     
         1 . A circuit structure, comprising:
 a pad, disposed on a substrate;   a dielectric layer, disposed on the substrate and exposing a portion of the pad;   a conductive layer, contacting the pad and extending from the pad to cover a top surface of the dielectric layer;   an adhesion layer, disposed between the dielectric layer and the conductive layer; and   a conductive bump, extending in an upward manner from a top surface of the conductive layer, wherein the conductive bump and the conductive layer are integrally formed.   
     
     
         2 . The circuit structure as recited in  claim 1 , wherein the conductive layer and the conductive bump are constituted by a plurality of conductive particles in contact with each other. 
     
     
         3 . The circuit structure as recited in  claim 2 , wherein the conductive layer and the conductive bump share at least one of the plurality of conductive particles. 
     
     
         4 . The circuit structure as recited in  claim 2 , wherein the plurality of conductive particles comprise a plurality of metal nanoparticles, and the plurality of metal nanoparticles comprise silver nanoparticles, copper-silver nanoparticles, copper nanoparticles, or a combination thereof. 
     
     
         5 . The circuit structure as recited in  claim 1 , wherein an interface is free between the conductive layer and the conductive bump. 
     
     
         6 . The circuit structure as recited in  claim 1 , wherein the adhesion layer comprises an insulation polymer, and the insulation polymer comprises polyimide, polyurethane, SU-8, an adhesive, or a combination thereof. 
     
     
         7 . The circuit structure as recited in  claim 1 , further comprising:
 a solder layer, disposed on the conductive bump; and   a passivation layer, disposed on the conductive layer and covering a portion of a sidewall of the conductive bump.   
     
     
         8 . A method of manufacturing a circuit structure, comprising:
 forming a pad on a substrate;   forming a dielectric layer on the substrate, the dielectric layer having an opening exposing a portion of the pad;   forming an adhesion layer on the dielectric layer, the adhesion layer covering a sidewall of the opening and extending to cover a top surface of the dielectric layer;   forming a circuit layer by using a first 3D printing technology, the circuit layer comprising:
 a conductive layer, contacting the pad and extending along a first direction from the pad to cover a top surface of the adhesion layer; and 
 a conductive bump, extending along a second direction from a first top surface of the conductive layer on the adhesion layer, wherein the first direction is different from the second direction; 
   forming a passivation layer on the circuit layer, the passivation layer covering a second top surface of the conductive layer and covering a portion of a sidewall of the conductive bump; and   forming a solder layer on the conductive bump.   
     
     
         9 . The method of manufacturing the circuit structure as recited in  claim 8 , wherein the forming the circuit layer by using the first 3D printing technology comprises using conductive ink, the conductive ink comprises a plurality of metal nanoparticles, and the plurality of metal nanoparticles comprise silver nanoparticles, copper-silver nanoparticles, copper nanoparticles, or a combination thereof. 
     
     
         10 . The method of manufacturing the circuit structure as recited in  claim 8 , wherein the adhesion layer, the solder layer, and the passivation layer are formed by using a second 3D printing technology.