US2021104402A1PendingUtilityA1

Sonos ono stack scaling

Assignee: Longitude Flash Memory Solutions LtdPriority: May 25, 2007Filed: Jun 29, 2020Published: Apr 8, 2021
Est. expiryMay 25, 2027(~0.9 yrs left)· nominal 20-yr term from priority
H10P 95/00H10P 14/6526H10P 14/3802H10P 14/3456H10P 14/3411H10P 14/662H10P 14/60H10P 14/6309H10D 62/83H10D 64/693H10D 64/687H10D 64/685H10D 64/661H10D 64/514H10D 64/037H10D 62/40H10D 30/0413H10D 30/69H01L 29/66833H01L 21/02332H01L 29/04H01L 21/02238H01L 29/40117H01L 29/518H01L 21/02667H01L 21/02595H01L 29/16H01L 21/31H01L 21/02532H01L 29/792H01L 29/42364H01L 29/515H01L 21/022H01L 21/3105H01L 29/4916H01L 29/513
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Claims

Abstract

A method of scaling a nonvolatile trapped-charge memory device and the device made thereby is provided. In an embodiment, the method includes forming a channel region including polysilicon electrically connecting a source region and a drain region in a substrate. A tunneling layer is formed on the substrate over the channel region by oxidizing the substrate to form an oxide film and nitridizing the oxide film. A multi-layer charge trapping layer including an oxygen-rich first layer and an oxygen-lean second layer is formed on the tunneling layer, and a blocking layer deposited on the multi-layer charge trapping layer. In one embodiment, the method further includes a dilute wet oxidation to densify a deposited blocking oxide and to oxidize a portion of the oxygen-lean second layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method comprising:
 forming a polysilicon channel region;   forming a tunneling layer over the polysilicon channel region;   forming a multi-layer charge trapping layer on the tunneling layer, wherein the multi-layer charge trapping layer comprises an oxygen-rich layer and an oxygen-lean layer; and   forming a blocking layer on the multi-layer charge trapping layer.

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