Shutting down gpu components in response to unchanged scene detection

Abstract

Methods and apparatus relating to techniques for shutting down one or more GPU (Graphics Processing Unit) components in response to unchanged scene detection are described. In one embodiment, one or more components of a processor enter a low power consumption state in response to a determination that a scene to be displayed is static. The static scene is displayed on a display device (e.g., based on information to be retrieved from memory) for as long as no change to the static scene is detected. Other embodiments are also disclosed and claimed.

1 . An apparatus comprising:
 logic, at least a portion of which is in hardware, to cause one or more components of a processor to enter a low power consumption state in response to a determination that a scene to be displayed is static,   wherein the static scene is to be displayed on a display device, based on information to be retrieved from memory, for as long as no change to the static scene is detected, wherein the scene is to be stored in the memory based on a user eye position coordinate.   
     
     
         2 . The apparatus of  claim 1 , wherein the memory comprises a frame buffer. 
     
     
         3 . The apparatus of  claim 2 , wherein the processor comprises the frame buffer. 
     
     
         4 . The apparatus of  claim 1 , comprising logic to determine whether the scene is stored in the memory based on a hash value. 
     
     
         5 . The apparatus of  claim 1 , comprising logic to determine whether a rendered frame is to be stored in the memory based at least in part on a determination of whether the rendered frame is static. 
     
     
         6 . The apparatus of  claim 1 , comprising logic to communicate information, corresponding to one or more changes to one or more rendering commands or the scene, to graphics logic. 
     
     
         7 . The apparatus of  claim 1 , wherein the low power consumption state is to be selected from one of: a power off state, a sleep state, a deep sleep state, or a hibernation state. 
     
     
         8 . The apparatus of  claim 1 , wherein the one or more components of the processor comprise one or more processor cores. 
     
     
         9 . The apparatus of  claim 1 , wherein the processor comprises the logic. 
     
     
         10 . The apparatus of  claim 1 , wherein the processor comprises a Graphics Processing Unit (GPU) having one or more graphics processing cores. 
     
     
         11 . The apparatus of  claim 1 , wherein one or more of: the processor, the logic, and the memory are on a single integrated circuit die. 
     
     
         12 . One or more non-transitory computer-readable media comprising one or more instructions that when executed on a processor configure the processor to perform one or more operations to:
 cause one or more components of a processor to enter a low power consumption state in response to a determination that a scene to be displayed is static,   wherein the static scene is to be displayed on a display device, based on information to be retrieved from memory, for as long as no change to the static scene is detected, wherein the scene is to be stored in the memory based on a user eye position coordinate.   
     
     
         13 . The one or more computer-readable media of  claim 12 , wherein the memory comprises a frame buffer. 
     
     
         14 . The one or more computer-readable media of  claim 13 , wherein the processor comprises the frame buffer. 
     
     
         15 . The one or more computer-readable media of  claim 12 , further comprising one or more instructions that when executed on the at least one processor configure the at least one processor to perform one or more operations to cause a determination of whether the scene is stored in the memory based on a hash value. 
     
     
         16 . The one or more computer-readable media of  claim 12 , further comprising one or more instructions that when executed on the at least one processor configure the at least one processor to perform one or more operations to cause a determination of whether a rendered frame is to be stored in the memory based at least in part on a determination of whether the rendered frame is static. 
     
     
         17 . The one or more computer-readable media of  claim 12 , further comprising one or more instructions that when executed on the at least one processor configure the at least one processor to perform one or more operations to cause communication of information, corresponding to one or more changes to one or more rendering commands or the scene, to graphics logic. 
     
     
         18 . The one or more computer-readable media of  claim 12 , further comprising one or more instructions that when executed on the at least one processor configure the at least one processor to perform one or more operations to cause selection of the low power consumption state from one of: a power off state, a sleep state, a deep sleep state, or a hibernation state. 
     
     
         19 . The one or more computer-readable media of  claim 12 , wherein the processor comprises the logic. 
     
     
         20 . The one or more computer-readable media of  claim 12 , wherein the processor comprises a Graphics Processing Unit (GPU) having one or more graphics processing cores.