Top-side connector interface for processor packaging

Abstract

An apparatus is provided which comprises: a processor die; a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface which is connectable to a top-side connector; and an interposer coupled to the processor substrate and a motherboard.

We claim: 
     
         1 . An apparatus comprising:
 a processor die;   a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface on the extended region of the processor substrate, wherein the one signal interface is configured to be coupled to a top-side connector, wherein the one signal interface is along a same plane as the processor die; and   an interposer coupled to the processor substrate and a motherboard.   
     
     
         2 . The apparatus of  claim 1 , wherein the at least one signal interface is configured to be coupled to a top-side connector such that the top-side connector is on a same plane as the processor die. 
     
     
         3 . The apparatus of  claim 1 , wherein the processor die is mounted on the processor substrate away from the extended region of the processor substrate. 
     
     
         4 . The apparatus of  claim 1 , wherein the interposer is extended along the direction of the extended region of the processor substrate. 
     
     
         5 . The apparatus of  claim 4 , wherein an extended region of the interposer, along the direction of the extended region of the processor substrate, is configured to be directly connected to a second top-side connected via an interface on the interposer. 
     
     
         6 . The apparatus of  claim 4 , wherein the interposer comprises a reflow grid array (RGA). 
     
     
         7 . The apparatus of  claim 6 , wherein the RGA comprises heat traces to distribute heat uniformly in the RGA. 
     
     
         8 . The apparatus of  claim 6 , wherein the RGA comprises heat traces to evenly distribute heat to allow ball grid array (BGA) balls to reflow and attach a BGA to the RGA. 
     
     
         9 . The apparatus of  claim 1 , wherein the processor substrate comprises a substrate of a ball grid array (BGA). 
     
     
         10 . The apparatus of  claim 1 , wherein the top-side connector comprises screws to fasten the top-side connector to the processor substrate. 
     
     
         11 . A system comprising:
 a memory;   a processor die coupled to the memory; and   a package to encase the processor die, the package including:   a processor substrate having a region extended away from the processor die, wherein the processor die is mounted on the processor substrate, wherein the extended region has at least one signal interface on the extended region of the processor substrate, wherein the one signal interface is configured to be coupled to a top-side connector, wherein the one signal interface is along a same plane as the processor die; and   an interposer coupled to the processor substrate and a motherboard.   
     
     
         12 . The system of  claim 11 , wherein the at least one signal interface is configured to be coupled to a top-side connector such that the top-side connector is on a same plane as the processor die. 
     
     
         13 . The system of  claim 11 , wherein the processor die is mounted on the processor substrate away from the extended region of the processor substrate. 
     
     
         14 . The system of  claim 11 , wherein the interposer is extended along the direction of the extended region of the processor substrate. 
     
     
         15 . The system of  claim 14 , wherein an extended region of the interposer, along the direction of the extended region of the processor substrate, is configured to be directly connected to a second top-side connector connected via an interface on the interposer. 
     
     
         16 . The system of  claim 14 , wherein the interposer comprises a reflow grid array (RGA). 
     
     
         17 . The system of  claim 16 , wherein the RGA comprises heat traces to distribute heat uniformly in the RGA, wherein the RGA comprises heat traces to evenly distribute heat to allow ball grid array (BGA) balls to reflow and attach a BGA to the RGA. 
     
     
         18 . A method comprising:
 mounting a processor die on a processor substrate, wherein the processor substrate includes a region extended away from the processor die, wherein the extended region has at least one signal interface on the extended region of the processor substrate;   configuring the one signal interface to be coupled to a top-side connector, wherein the one signal interface is along a same plane as the processor die; and   coupling an interposer to the processor substrate and a motherboard.   
     
     
         19 . The method of  claim 18 , wherein configuring the at least one signal interface to be coupled to a top-side connector comprises placing the top-side connector on a same plane as the processor die. 
     
     
         20 . The method of  claim 18  comprising:
 extending the interposer along the direction of the extended region of the processor substrate; and 
 configuring the interposer to be directly connected to a second top-side connected via an interface on the interposer.