Secure semiconductor integration

Abstract

A system comprising a plurality of electronic components, wherein said plurality of electronic components including a first component and a second component, and said first component is a security component configured to generate and/or store security key(s); a substrate; one or more standoff substrate(s) comprising of cavity(3ies), wherein said one or more standoff substrate(s) is/are coupled to said substrate, said one or more standoff substrate(s) completely encircles said substrate, said security component is disposed inside said cavity(ies), said security component is coupled to said substrate, said security component is obfuscated by said substrate and said one or more standoff substrate(s), and said security component and said second component are configured to communicate security key(s) for performing device identification, authentication, encryption, and/or device integrity verification.

1 . A system comprising:
 a plurality of components, wherein   said plurality of components including a first component and a second component, and   said first component is a security component configured to generate and/or store security key(s);   a substrate;   one or more standoff substrate(s) comprising of cavity(ies), wherein   said one or more standoff substrate(s) is/are coupled to said substrate,   said one or more standoff substrate(s) completely encircles said substrate,   said security component is disposed inside said cavity(ies),   said security component is coupled to said substrate,   said security component is obfuscated by said substrate and/or said one or more standoff substrate(s) to minimize tampering, and   said security component and said second component are configured to communicate security key(s) for performing device identification, authentication, encryption, and/or device integrity verification.   
     
     
         2 . A system according to  claim 1 , wherein
 one of said plurality of components is configured to perform tamper detection.   
     
     
         3 . A system according to  claim 1 , wherein
 one of said plurality of components disposed inside said cavity(ies) is a power (voltage) regulator.   
     
     
         4 . A system according to  claim 1 , wherein
 said the one standoff substrate doesn't encircle said substrate(s).   
     
     
         5 . A system according to  claim 1 , wherein
 said one or more standoff substrate(s) are spaced apart.   
     
     
         6 . A system according to  claim 1 , wherein
 said substrate(s) comprises of one or more cavity(ies).   
     
     
         7 . A system according to  claim 1 , wherein
 said substrate(s) and/or standoff substrate(s) comprises of anti-tamper mesh.   
     
     
         8 . A system according to  claim 1 , wherein
 said substrate(s) and/or standoff substrate(s) comprises of molding compound.   
     
     
         9 . A system according to  claim 1 , wherein
 one of said plurality of the components is a power management/regulator or security sub-circuit or tamper detect circuit or router or switch or antenna or radar or phased array or modem or baseband or transceiver or mm-wave subsystem or silicon-on-insulator or amplifier or Field Programmable Gate Array (FPGA) or capacitor or resistor or inductor or processor or memory or sensor or analog-to-digital converter or digital-to-analog converter or electrical-optical converter or optical-electrical converter or Light Emitting Diode (LED) or Application-Specific Integrated Circuit (ASIC) or Through-Silicon Via (TSV) or laser or analog circuit or digital circuit or Serializer/Deserializer (SerDes) or filter or Lens or Graphics Processing Unit (GPU) or magnet or waveguide or wirebond or epoxy mold compound (EMC) or under-fill material or heat-pipe or mirror or fan or bump or fiber or accelerator/co-processor or processor core or Microelectromechanical Systems (MEMS) or membrane or heat spreader or energy source or sensing material or piezoelectric or light source or touch screen or Liquid Crystal Display (LCD) or organic light-emitting diode (OLED) or battery or Electromagnetic Shield (EMI) coating.   
     
     
         10 . A system comprising:
 a plurality of components, wherein   said plurality of components including a first component and a second component, and   said first component is a security component configured to generate and/or store security key(s);   a first substrate;   a second substrate;   one or more standoff substrate(s) comprising of cavity(ies), wherein   said one or more standoff substrate(s) is/are coupled to said first substrate and said second substrate,   said one or more standoff substrate(s) completely encircles said first substrate and/or said second substrate,   said security component is disposed inside said cavity(ies),   said security component is coupled to said first substrate and/or said second substrate,   said security component is obfuscated by said first substrate and/or said second substrate and/or said one or more standoff substrate(s) to minimize tampering,   said second component is coupled to said first substrate and/or said second substrate,   said second component is configured to communicate with said security component, and   said security component and said second component are configured to communicate security key(s) for performing device identification, authentication, encryption, and/or device integrity verification.   
     
     
         11 . A system according to  claim 10 , wherein
 one of said plurality of components is configured to perform tamper detection.   
     
     
         12 . A system according to  claim 10 , wherein
 one of said plurality of components disposed inside said cavity(ies) is a power (voltage) regulator.   
     
     
         13 . A system according to  claim 10 , wherein
 said the one standoff substrate doesn't encircle said first substrate and/or said second substrate.   
     
     
         14 . A system according to  claim 10 , wherein
 said one or more standoff substrate(s) are spaced apart.   
     
     
         15 . A system according to  claim 10 , wherein
 said first substrate and/or said second substrate comprises of one or more cavity(ies).   
     
     
         16 . A system according to  claim 10 , wherein
 said first substrate and/or said second substrate and/or said standoff substrate(s) comprises of anti-tamper mesh.   
     
     
         17 . A system according to  claim 10 , wherein
 said first substrate and/or said second substrate and/or said standoff substrate(s) comprises of molding compound.   
     
     
         18 . A system according to  claim 10 , wherein
 one of said plurality of the components is a power management/regulator or security sub-circuit or tamper detect circuit or router or switch or antenna or radar or phased array or modem or baseband or transceiver or mm-wave subsystem or silicon-on-insulator or amplifier or Field Programmable Gate Array (FPGA) or capacitor or resistor or inductor or processor or memory or sensor or analog-to-digital converter or digital-to-analog converter or electrical-optical converter or optical-electrical converter or Light Emitting Diode (LED) or Application-Specific Integrated Circuit (ASIC) or Through-Silicon Via (TSV) or laser or analog circuit or digital circuit or Serializer/Deserializer (SerDes) or filter or Lens or Graphics Processing Unit (GPU) or magnet or waveguide or wirebond or epoxy mold compound (EMC) or under-fill material or heat-pipe or mirror or fan or bump or fiber or accelerator/co-processor or processor core or Microelectromechanical Systems (MEMS) or membrane or heat spreader or energy source or sensing material or piezoelectric or light source or touch screen or Liquid Crystal Display (LCD) or organic light-emitting diode (OLED) or battery or Electromagnetic Shield (EMI) coating.   
     
     
         19 . A system comprising:
 a plurality of components, wherein   said plurality of components including a first component and a second component, and   said first component is a security component configured to generate and/or store security key(s);   a first substrate;   a second substrate, wherein   said second substrate comprising cavity(ies); and   one or more standoff substrate(s), wherein   said one or more standoff substrate comprising said cavity(ies),   said security component is disposed inside said second substrate cavity(ies),   said second substrate is coupled to said first substrate,   said one or more standoff substrate(s) is/are coupled to said first substrate and/or said second substrate,   said one or more standoff substrate(s) completely encircles said first substrate and/or said second substrate,   said security component is obfuscated by said first substrate and/or said second substrate and/or said one or more standoff substrate(s) to minimize tampering,   said second component is coupled to said first substrate or said second substrate,   said second component is configured to communicate with said security component, and   said security component and said second component are configured to communicate security key(s) for performing device identification, authentication, encryption, and/or device integrity verification.   
     
     
         20 . A system according to  claim 19 , wherein
 one of said plurality of components is configured to perform tamper detection.   
     
     
         21 . A system according to  claim 19 , wherein
 one of said plurality of components disposed inside said cavity(ies) is a power (voltage) regulator.   
     
     
         22 . A system according to  claim 19 , wherein
 said the one standoff substrate doesn't encircle said first substrate and/or said second substrate.   
     
     
         23 . A system according to  claim 19 , wherein
 said one or more standoff substrate(s) are spaced apart.   
     
     
         24 . A system according to  claim 19 , wherein
 said first substrate and/or said second substrate comprises of one or more cavity(ies).   
     
     
         25 . A system according to  claim 19 , wherein
 said first substrate and/or said second substrate and/or said standoff substrate(s) comprises of anti-tamper Redistribution layer(s).   
     
     
         26 . A system according to  claim 19 , wherein
 said first substrate and/or said second substrate and/or said standoff substrate(s) comprises of molding compound.   
     
     
         27 . A system according to  claim 19 , wherein
 one of said plurality of the components is a power management/regulator or security sub-circuit or tamper detect circuit or router or switch or antenna or radar or phased array or modem or baseband or transceiver or mm-wave subsystem or silicon-on-insulator or amplifier or Field Programmable Gate Array (FPGA) or capacitor or resistor or inductor or processor or memory or sensor or analog-to-digital converter or digital-to-analog converter or electrical-optical converter or optical-electrical converter or Light Emitting Diode (LED) or Application-Specific Integrated Circuit (ASIC) or Through-Silicon Via (TSV) or laser or analog circuit or digital circuit or Serializer/Deserializer (SerDes) or filter or Lens or Graphics Processing Unit (GPU) or magnet or waveguide or wirebond or epoxy mold compound (EMC) or under-fill material or heat-pipe or mirror or fan or bump or fiber or accelerator/co-processor or processor core or Microelectromechanical Systems (MEMS) or membrane or heat spreader or energy source or sensing material or piezoelectric or light source or touch screen or Liquid Crystal Display (LCD) or organic light-emitting diode (OLED) or battery or Electromagnetic Shield (EMI) coating.   
     
     
         28 . A system according to  claim 24 , wherein
 said one or more standoff substrate(s) is/are coupled to said one or more cavity(ies) of said first substrate and/or said second substrate.   
     
     
         29 . A system according to  claim 15 , wherein
 said one or more standoff substrate(s) is/are coupled to said one or more cavity(ies) of said first substrate and/or said second substrate.   
     
     
         30 . A system according to  claim 6 , wherein
 said one or more standoff substrate(s) is/are coupled to said substrate cavity(ies).