Nonvolatile semiconductor memory device and method of manufacturing the same

Abstract

According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.

What is claimed is: 
     
         1 . A nonvolatile semiconductor memory device, comprising:
 a plurality of conductive layers extending in a first direction, the plurality of conductive layers including
 a first conductive layer, 
 a second conductive layer, the first conductive layer and the second conductive layer being arranged in a second direction, 
 a third conductive layer, the first conductive layer and the third conductive layer being arranged in a third direction through a first insulating plate, the first insulating plate extending in the first direction and the second direction, and 
 a fourth conductive layer, the second conductive layer and the fourth conductive layer being arranged in the third direction through the first insulating plate, the third conductive layer and the fourth conductive layer being arranged in the second direction; 
   a first semiconductor layer extending in the second direction;   a first charge accumulation portion surrounding the first semiconductor layer, the first conductive layer surrounding the first charge accumulation portion;   a second semiconductor layer extending in the second direction; and   a second charge accumulation portion surrounding the second semiconductor layer, the third conductive layer surrounding the second charge accumulation portion, wherein   the first conductive layer has a first surface facing the first insulating plate, the first surface having a first portion, a second portion and a third portion arranged in this order in the second direction,   the third conductive layer has a second surface facing the first insulating plate, the second surface having a fourth portion, a fifth portion and a sixth portion arranged in this order in the second direction,   a first distance between the first portion and the fourth portion in the third direction is larger than a second distance between the second portion and the fifth portion in the third direction, and   a third distance between the third portion and the sixth portion in the third direction is larger than the second distance in the third direction.