Electronic device with adaptive vertical interconnect and fabricating method thereof

Abstract

Electronic components and an electronic device comprising one or more of the electronic components, and a method of manufacturing the electronic components and an electronic device comprising one or more of the electronic components. As non-limiting examples, various aspects of this disclosure provide vertical interconnect components and various other vertical electronic components, and a method of manufacturing thereof, and an electronic device comprising one or more of the vertical interconnect components and various other vertical electronic components, and a method of manufacturing thereof.

1 - 20 . (canceled) 
     
     
         21 . An electronic device comprising:
 a substrate having a first side and a second side;   a first component comprising:
 a top component side, a bottom component side, and lateral component sides extending between the top component side and the bottom component side, wherein the bottom component side is mounted to the first side of the substrate; 
 at least one row of a plurality of vertical vias extending between the top component side and the bottom component side; and 
 a molding material laterally surrounding each of the plurality of vertical vias, wherein the lateral component sides comprise only the molding material; 
   a semiconductor die having a top die side, a bottom die side, and lateral die sides extending between the top die side and the bottom die side, the bottom die side coupled to the first side of the substrate; and   a molded package body comprising a molding compound covering at least a portion of the first side of the substrate, at least a portion of the lateral die sides, and at least a portion of the lateral component sides.   
     
     
         22 . The electronic device of  claim 21 , wherein the substrate comprises a conductive layer that electrically connects a die pad of the semiconductor die to a first end of at least one of the plurality of vertical vias. 
     
     
         23 . The electronic device of  claim 22 , wherein:
 the substrate comprises a dielectric layer comprising a first aperture through which the die pad of the semiconductor die is exposed from the dielectric layer, and a second aperture through which the first end of at least one of the plurality of vertical vias is exposed from the dielectric layer; and   the conductive layer extends into the first and second apertures.   
     
     
         24 . The electronic device of  claim 21 , wherein the molding compound of the molded package body laterally surrounds the entire semiconductor die and the entire first component. 
     
     
         25 . The electronic device of  claim 24 , wherein a top side of the molding compound is coplanar with the top component side. 
     
     
         26 . The electronic device of  claim 21 , wherein the molding compound covers the top die side. 
     
     
         27 . The electronic device of  claim 21 , wherein each of the plurality of vertical vias is exposed from the molding material at the top component side and the bottom component side. 
     
     
         28 . The electronic device of  claim 21 , wherein the each of the plurality of vertical vias is one of a plurality of parallel straight-line traces of a component conductive layer. 
     
     
         29 . The electronic device of  claim 21 , comprising a die pad on the bottom die side, wherein the die pad on the bottom die side is attached to the substrate. 
     
     
         30 . An electronic device comprising:
 a signal distribution structure (SDS);   a first component mounted to the SDS, the first component comprising:
 a plurality of parallel vias, each of the plurality of parallel vias having a first end surface, a second end surface, and a lateral side surface; 
 an encapsulating material covering the lateral side surface of each of the plurality of parallel vias, the encapsulating material having a top component side, a bottom component side, and lateral components sides extending between the top and bottom component sides, the first end surface of each of the plurality of parallel vias exposed from the top component side of the encapsulating material, and the second end surface of each of the plurality of parallel vias exposed from the bottom component side of the encapsulating material; 
   a semiconductor die coupled to the SDS; and   a molded package body comprising a molding compound laterally covering the semiconductor die and the lateral components sides, the molding compound coplanar with the top component side.   
     
     
         31 . The electronic device of  claim 30 , wherein the molding compound of the molded package body laterally surrounds the entire semiconductor die. 
     
     
         32 . The electronic device of  claim 31 , wherein the molding compound covers the top die side. 
     
     
         33 . The electronic device of  claim 30 , wherein the SDS comprises an SDS conductive path that electrically connects a die pad of the semiconductor die to the first end surface of at least one of the plurality of parallel vias. 
     
     
         34 . The electronic device of  claim 33 , wherein:
 the SDS comprises a dielectric layer comprising a first aperture through which the die pad of the semiconductor die is exposed from the dielectric layer, and a second aperture through which the first end surface of at least one of the plurality of parallel vias is exposed from the dielectric layer; and   the SDS conductive path extends into the first and second apertures.   
     
     
         35 . The electronic device of  claim 30 , wherein the plurality of parallel vias comprise at least three parallel vias arranged in a row. 
     
     
         36 . An electronic device comprising:
 a substrate having a first side and a second side;   a first component comprising:
 a top component side, a bottom component side, and lateral component sides extending between the top component side and the bottom component side, wherein the bottom component side is mounted to the first side of the substrate; 
 a conductive pattern comprising a first pattern end; and 
 a molding material at least partially laterally surrounding the conductive pattern, wherein the first pattern end is exposed from the molding material at the bottom component side; 
   a semiconductor die having a top die side, a bottom die side, and lateral die sides extending between the top die side and the bottom die side, the bottom die side coupled to the first side of the substrate; and   a molding compound covering at least a portion of the first side of the substrate, the lateral die sides, and the lateral component sides, the molding compound coplanar with the top component side.   
     
     
         37 . The electronic device of  claim 36 , wherein the conductive pattern comprises at least one trace. 
     
     
         38 . The electronic device of  claim 36 , wherein the conductive pattern comprises a second pattern end, the second pattern end exposed from the molding material at the top component side. 
     
     
         39 . The electronic device of  claim 38 , wherein the conductive pattern is one of a resistive component pattern, a capacitive component pattern, a bimetallic connection component pattern, a shield component pattern, an inductive component pattern, a coaxial connection component pattern, and an insulated coaxial connection component pattern. 
     
     
         40 . The electronic device of  claim 36 , wherein the conductive pattern comprises a second pattern end, the second pattern end exposed from the molding material at the bottom component side, and wherein the conductive pattern is an inductive component pattern.