US2021376145A1PendingUtilityA1

Ldmos device and manufacturing method thereof

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Assignee: SEMICONDUCTOR MFG INT BEIJING CORPPriority: Feb 26, 2019Filed: Aug 12, 2021Published: Dec 2, 2021
Est. expiryFeb 26, 2039(~12.6 yrs left)· nominal 20-yr term from priority
H10D 30/603H10D 64/111H10D 30/0281H10D 30/0221H10D 30/0212H10D 62/124H10D 62/113H10D 30/65H01L 29/66681H01L 29/7816H01L 29/402
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Claims

Abstract

The present disclosure provides an LDMOS device and a manufacturing method thereof. The LDMOS device includes: a substrate, a drift region formed in the substrate; a gate structure, located on the substrate on one side of the drift region, and covering part of the drift region; a drain region, located in the drift region on one side of the gate structure, an isolation structure located on the substrate, the isolation structure located between the drain region and the gate structure; a gate electrode, located on the gate structure and electrically connected with the gate structure; a drain electrode, located on the drain region and electrically connected with the drain region; a block layer, covering the drift region and the isolation structure between the gate electrode and the drain electrode in a shape-preserving manner; and a groove electrode located on the block layer, the groove electrode located between the isolation structure and the gate structure, and at least covering part of the top of the isolation structure. The LDMOS device improves a device breakdown voltage, and cannot increase Rdson.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A manufacturing method of a Laterally Diffused Metal Oxide Semiconductor (LDMOS) device, comprising:
 providing a substrate with a drift region formed in the substrate;   forming a gate structure on the substrate, the gate structure located on one side of the drift region and covering part of the drift region;   forming an isolation structure on the substrate, the isolation structure located on the drift region;   forming a drain region in the drift region on one side of the gate structure, the drain region isolated from the gate structure, wherein the isolation structure is located between the gate structure and the drain region, and the isolation structure is isolated from the gate structure;   after forming the gate structure, the isolation structure and the drain region, forming a block layer covering the drift region and the isolation structure in a shape-preserving manner; and   after forming the block layer, forming a drain electrode, a gate electrode and a groove electrode, wherein the drain electrode is located on a top of the drain region and electrically connected with the drain region, the gate electrode is located on a top of the gate structure and electrically connected with the gate structure, and the groove electrode is located on the block layer between the isolation structure and the gate structure, and at least covers part of a top of the isolation structure.   
     
     
         2 . The manufacturing method of an LDMOS device according to  claim 1 , wherein a material of the isolation structure is an insulating material and/or a semiconductor material. 
     
     
         3 . The manufacturing method of an LDMOS device according to  claim 2 , wherein in the step of forming the gate structure, the isolation structure is formed at the same time. 
     
     
         4 . The manufacturing method of an LDMOS device according to  claim 3 , wherein in the step of forming the gate structure, forming the isolation structure at the same time comprises:
 forming a gate dielectric material layer on the substrate;   forming a gate material layer on the gate dielectric material layer; and   patterning the gate material layer and the gate dielectric material layer, and forming a first gate dielectric layer and a second gate dielectric layer which are discrete, wherein a first gate layer is located on the first gate dielectric layer and a second gate layer is located on the second gate dielectric layer, the first gate dielectric layer and the first gate layer form the gate structure, and the second gate dielectric layer and the second gate layer form the isolation structure.   
     
     
         5 . The manufacturing method of an LDMOS device according to  claim 4 , further comprising:
 before the forming a block layer:
 forming a mask layer on the substrate, the mask layer exposing a top of the first gate layer and covering the isolation structure; 
 using the mask layer as a mask, implanting doping ions in the first gate layer; and 
 removing the mask layer. 
   
     
     
         6 . The manufacturing method of an LDMOS device according to  claim 4 , wherein a step of forming the gate structure and the isolation structure further comprises:
 forming a side wall material layer covering the substrate, the first gate layer, the first gate dielectric layer, the second gate layer and the second gate dielectric layer in the shape-preserving manner; and   etching and removing the side wall material layer on a top of the substrate, a top of the first gate layer and a top of the second gate layer, reserving a remaining side wall material layer on side walls of the first gate layer and the first gate dielectric layer to serve as a first side wall, and reserving a remaining side wall material layer on side walls of the second gate layer and the second gate dielectric layer to serve as a second side wall.   
     
     
         7 . The manufacturing method of an LDMOS device according to  claim 1 , wherein the groove electrode covers the entire top of the isolation structure. 
     
     
         8 . The manufacturing method of an LDMOS device according to  claim 1 , wherein the block layer is a metal silicide block layer.

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