Probe interrupt delivery
Abstract
Systems, apparatuses, and methods for routing interrupts on a coherency probe network are disclosed. A computing system includes a plurality of processing nodes, a coherency probe network, and one or more control units. The coherency probe network carries coherency probe messages between coherent agents. Interrupts that are detected by a control unit are converted into messages that are compatible with coherency probe messages and then routed to a target destination via the coherency probe network. Interrupts are generated with a first encoding while coherency probe messages have a second encoding. Cache subsystems determine whether a message received via the coherency probe network is an interrupt message or a coherency probe message based on an encoding embedded in the received message. Interrupt messages are routed to interrupt controller(s) while coherency probe messages are processed in accordance with a coherence probe action field embedded in the message.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A system comprising:
one or more processing nodes; a control unit; and a coherency probe network configured to convey coherency probe messages between the one or more processing nodes and the control unit; wherein the control unit is configured to:
generate an interrupt message that is compatible with a coherency probe message, responsive to detecting an interrupt; and
send, via the coherency probe network, the interrupt message on a path to a target.
2 . The system as recited in claim 1 , wherein the control unit is further configured to:
generate a first encoding for coherency probe messages; embed the first encoding in a given field of coherency probe messages sent on the coherency probe network; generate a second encoding for interrupt messages, wherein the second encoding is different from the first encoding; and embed the second encoding in the given field of interrupt messages sent on the coherency probe network.
3 . The system as recited in claim 1 , wherein the interrupt message includes an encoding in a response field that indicates no response needs to be sent.
4 . The system as recited in claim 1 , wherein the system further comprises one or more cache subsystems, wherein each cache subsystem is configured to determine whether a received message is a coherency probe message or an interrupt message based on an embedded encoding.
5 . The system as recited in claim 4 , wherein each cache subsystem is further configured to broadcast an interrupt message to a plurality of processor cores of a respective node responsive to determining that the received message is an interrupt message.
6 . The system as recited in claim 1 , wherein fields of the interrupt message are aligned to match fields of the coherency probe message.
7 . The system as recited in claim 1 , wherein the control unit is further configured to encode a coherency probe action field of the interrupt message with an interrupt delivery indicator.
8 . A method comprising:
generating, by a control unit, an interrupt message that is compatible with a coherency probe message responsive to detecting an interrupt; and sending, via a coherency probe network, the interrupt message on a path to a target, wherein the coherency probe network is configured to carry coherency probes between one or more processing nodes and the control unit.
9 . The method as recited in claim 8 , further comprising:
generating a first encoding for coherency probe messages; embedding the first encoding in a given field of coherency probe messages sent on the coherency probe network; generating a second encoding for interrupt messages, wherein the second encoding is different from the first encoding; and embedding the second encoding in the given field of interrupt messages sent on the coherency probe network.
10 . The method as recited in claim 8 , wherein the interrupt message includes an encoding in a response field that indicates no response needs to be sent.
11 . The method as recited in claim 8 , further comprising determining, by a cache subsystem, whether a received message is a coherency probe message or an interrupt message based on an embedded encoding.
12 . The method as recited in claim 11 , further comprising broadcasting, by the cache subsystem, an interrupt message to a plurality of processor cores of a respective node responsive to determining that the message is an interrupt message.
13 . The method as recited in claim 8 , wherein fields of the interrupt message are aligned to match fields of the coherency probe message.
14 . The method as recited in claim 8 , further comprising encoding a coherency probe action field of the interrupt message with an interrupt delivery indicator.
15 . An apparatus comprising:
a plurality of processor cores; and a cache subsystem; wherein the apparatus is configured to:
generate an interrupt message that is compatible with a coherency probe message responsive to detecting an interrupt; and
send, via a coherency probe network, the interrupt message on a path to a target device, wherein the coherency probe network is configured to carry coherency probes between the apparatus and one or more coherent agents.
16 . The apparatus as recited in claim 15 , wherein the apparatus is further configured to:
generate a first encoding for coherency probe messages; embed the first encoding in a given field of coherency probe messages sent on the coherency probe network; generate a second encoding for interrupt messages, wherein the second encoding is different from the first encoding; and embed the second encoding in the given field of interrupt messages sent on the coherency probe network.
17 . The apparatus as recited in claim 15 , wherein the interrupt message includes an encoding in a response field that indicates no response needs to be sent.
18 . The apparatus as recited in claim 15 , wherein the apparatus is further configured to determine whether a received message is a coherency probe message or an interrupt message based on an embedded encoding.
19 . The apparatus as recited in claim 18 , wherein the apparatus is further configured to broadcast an interrupt message to a plurality of processor cores of a respective node responsive to determining that the received message is an interrupt message.
20 . The apparatus as recited in claim 15 , wherein fields of the interrupt message are aligned to match fields of the coherency probe message.Join the waitlist — get patent alerts
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