Method of making heteroepitaxial structures and device formed by the method

Abstract

A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

1 - 30 . (canceled) 
     
     
         31 . A method for making a heteroepitaxial layer, the method comprising:
 providing a silicon semiconductor substrate;   forming a nanostructured pedestal on the semiconductor substrate, the pedestal having a top surface and a side surface;   providing a selective growth mask layer on the top surface and side surface of the pedestal;   removing a portion of the selective growth mask layer to expose the top surface of the pedestal;   selectively etching-back the exposed top surface of the pedestal to form a seed area, the seed area having a first linear surface dimension that ranges from about 10 nm to about 50 nm; and   growing a silicon-germanium heteroepitaxial layer on the seed area without nucleating substantially any threading dislocations, at least a portion of the silicon-germanium heteroepitaxial layer extending above the selective growth mask layer and having a width dimension that is wider than a corresponding width dimension of the seed area,   wherein the portion of the silicon-germanium heteroepitaxial layer above the selective growth mask layer has a polygonal cross-sectional shape.   
     
     
         32 . The method of  claim 31 , wherein the silicon-germanium heteroepitaxial layer is substantially defect-free. 
     
     
         33 . The method of  claim 31 , wherein the silicon-germanium heteroepitaxial layer slopes outward proximate the seed area and slopes inward distal from the seed area. 
     
     
         34 . The method of  claim 31 , wherein an entire silicon-germanium heteroepitaxial layer is grown above a top surface of the selective growth mask layer. 
     
     
         35 . The method of  claim 31 , wherein the silicon semiconductor substrate comprises silicon having a [001] direction normal to the substrate surface. 
     
     
         36 . The method of  claim 31 , wherein the nanostructured pedestal comprises a single crystal material chosen from silicon, III-V materials, sapphire and SiC. 
     
     
         37 . The method of  claim 31 , wherein the nanostructured pedestal comprises a single crystal material chosen from GaAs, GaSb and GaN. 
     
     
         38 . The method of  claim 31 , wherein the seed area comprises a (001) plane of silicon. 
     
     
         39 . The method of  claim 31 , wherein the silicon-germanium heteroepitaxial layer comprises a semiconductor material other than III-V materials. 
     
     
         40 . The method of  claim 31 , wherein the silicon-germanium heteroepitaxial layer comprises Ge 0.23 Si 0.77 . 
     
     
         41 . The method of  claim 31 , further comprising forming a portion of a transistor from the silicon-germanium heteroepitaxial layer. 
     
     
         42 . A method for making a heteroepitaxial layer, the method comprising:
 providing a silicon semiconductor substrate;   forming a nanostructured pedestal on the semiconductor substrate, the pedestal having a top surface and a side surface;   providing a selective growth mask layer on the top surface and side surface of the pedestal;   removing a portion of the selective growth mask layer to expose the top surface of the pedestal;   selectively etching-back the exposed top surface of the pedestal to form a seed area, the seed area having a linear surface dimension that ranges from about 10 nm to about 50 nm and a second linear surface dimension that ranges from about 200 nm to about 5000 nm; and   growing a silicon-germanium heteroepitaxial layer on the seed area without nucleating substantially any threading dislocations, at least a portion of the silicon-germanium heteroepitaxial layer extending above the selective growth mask layer and having a width dimension that is wider than a corresponding width dimension of the seed area,   wherein the portion of the silicon-germanium heteroepitaxial layer above the selective growth mask layer has a polygonal cross-sectional shape.   
     
     
         43 . The method of  claim 42 , wherein the silicon semiconductor substrate comprises silicon having a [001] direction normal to the substrate surface. 
     
     
         44 . The method of  claim 42 , wherein the seed area comprises a (001) plane of silicon. 
     
     
         45 . The method of  claim 44 , wherein the silicon-germanium heteroepitaxial layer comprises Ge 0.23 Si 0.77 .