Method of making heteroepitaxial structures and device formed by the method

Abstract

A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

What is claimed is: 
     
         1 . A method for making a heteroepitaxial layer, the method comprising:
 providing a semiconductor substrate;   forming a nanostructured pedestal on the semiconductor substrate, the pedestal having a top surface and a side surface;   providing a selective growth mask layer on the top surface and side surface of the pedestal;   removing a portion of the selective growth mask layer to expose the top surface of the pedestal;   selectively etching-back the exposed top surface of the pedestal to form a seed area, the seed area having a linear surface dimension that ranges from about 10 nm to about 100 nm, wherein the seed area of the pedestal has been selectively etched back; and   growing a heteroepitaxial layer on the seed area, wherein the heteroepitaxial layer is substantially unrestricted by sidewalls during growth and wherein a portion of the heteroepitaxial layer above the selective growth mask layer has a trapezoidal cross-sectional shape proximate to the seed area.   
     
     
         2 . The method of  claim 1 , wherein the seed area has been selectively etched back and is substantially level with the selective growth mask layer. 
     
     
         3 . The method of  claim 1 , wherein the heteroepitaxial layer converges toward a point distal to the seed area. 
     
     
         4 . The method of  claim 1 , wherein the top surface of the pedestal forms a seed area that is approximately coplanar with a top surface of the selective growth mask layer. 
     
     
         5 . The method of  claim 1 , wherein the heteroepitaxial layer is substantially defect-free. 
     
     
         6 . The method of  claim 1 , wherein an interface between the heteroepitaxial layer and the seed area is substantially defect-free. 
     
     
         7 . The method of  claim 1 , wherein the entire heteroepitaxial layer is above a top surface of the selective growth mask layer. 
     
     
         8 . The method of  claim 1 , wherein the semiconductor substrate comprises silicon having a [001] direction normal to a substrate surface. 
     
     
         9 . The method of  claim 1 , wherein the seed area comprises a (001) plane of silicon. 
     
     
         10 . The method of  claim 1 , wherein the heteroepitaxial layer forms a portion of a transistor. 
     
     
         11 . A method for making a heteroepitaxial layer, the method comprising:
 providing a semiconductor substrate;   forming a nanostructured pedestal on the semiconductor substrate, the pedestal having a top surface and a side surface;   providing a selective growth mask layer on the top surface and side surface of the pedestal;   removing a portion of the selective growth mask layer to expose the top surface of the pedestal;   selectively etching-back the exposed top surface of the pedestal to form a seed area, the seed area having a linear surface dimension that ranges from about 10 nm to about 50 nm, wherein the seed area has been selectively etched back and is substantially level with the selective growth mask layer; and   growing a heteroepitaxial layer on the seed area, wherein a portion of the heteroepitaxial layer above the selective growth mask layer has a trapezoidal cross-sectional shape proximate to the seed area and another portion of the heteroepitaxial layer above the selective growth mask layer converges toward a point distal to the seed area.   
     
     
         12 . The method of  claim 11 , wherein the heteroepitaxial layer is substantially unrestricted by sidewalls during growth. 
     
     
         13 . The method of  claim 11 , wherein the heteroepitaxial layer is substantially defect-free. 
     
     
         14 . The method of  claim 11 , wherein an interface between the heteroepitaxial layer and the seed area is substantially defect-free. 
     
     
         15 . The method of  claim 11 , wherein the heteroepitaxial layer slopes outwardly proximate to the seed area. 
     
     
         16 . The method of  claim 11 , wherein the heteroepitaxial layer slopes inwardly distal from the seed area. 
     
     
         17 . The method of  claim 11 , wherein the entire heteroepitaxial layer is above a top surface of the selective growth mask layer. 
     
     
         18 . The method of  claim 11 , wherein the semiconductor substrate comprises silicon having a [001] direction normal to a substrate surface. 
     
     
         19 . The method of  claim 11 , wherein the seed area comprises a (001) plane of silicon. 
     
     
         20 . The method of  claim 11 , wherein the heteroepitaxial layer forms a portion of a transistor. 
     
     
         21 . A method for making a heteroepitaxial layer, the method comprising:
 providing a semiconductor substrate;   forming a nanostructured pedestal on the semiconductor substrate, the pedestal having a top surface and a side surface;   providing a selective growth mask layer on the top surface and side surface of the pedestal;   removing a portion of the selective growth mask layer to expose the top surface of the pedestal;   selectively etching-back the exposed top surface of the pedestal to form a seed area, the seed area having a linear surface dimension that ranges from about 10 nm to about 50 nm, wherein the top surface of the pedestal forms the selectively etched back seed area that is approximately coplanar with a top surface of the selective growth mask layer; and   growing a heteroepitaxial layer on the seed area, wherein the heteroepitaxial layer grows wider than the seed area.   
     
     
         22 . The method of  claim 21 , wherein the heteroepitaxial layer is substantially unrestricted by sidewalls during growth. 
     
     
         23 . The method of  claim 21 , wherein the heteroepitaxial layer slopes outwardly proximate the seed area. 
     
     
         24 . The method of  claim 21 , wherein the heteroepitaxial layer slopes inwardly distal from the seed area. 
     
     
         25 . The method of  claim 21 , wherein the entire heteroepitaxial layer is above a top surface of the selective growth mask layer. 
     
     
         26 . The method of  claim 21 , wherein a portion of the heteroepitaxial layer above the selective growth mask layer has a trapezoidal cross-sectional shape proximate to the seed area. 
     
     
         27 . The method of  claim 21 , wherein another portion of the heteroepitaxial layer above the selective growth mask layer converges toward a point distal to the seed area.