Backside illumination type solid-state imaging device, manufacturing method for backside illumination type solid-state imaging device, imaging apparatus and electronic equipment

Abstract

The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.

What is claimed is: 
     
         1 - 26 . (canceled) 
     
     
         27 . A light detecting device comprising:
 a first section including:
 a first semiconductor element including a first semiconductor substrate at a light incident side and a first multilayer wiring layer at a opposite side of the light incident side; and 
   a second section including:
 a second semiconductor element including a second semiconductor substrate and a second multilayer wiring layer; and 
 a third semiconductor element including a third semiconductor substrate and a third multilayer wiring layer, 
 wherein the first semiconductor element and the second semiconductor element are bonded together such that the first multilayer wiring layer and the second multilayer wiring layer face each other, 
 wherein the first semiconductor element and the third semiconductor element are bonded together such that the first multilayer wiring layer and the third multilayer wiring layer face each other, and 
 wherein a size of the first semiconductor element is larger than a size of the second semiconductor element. 
   
     
     
         28 . The light detecting device according to  claim 27 , wherein the size of the first semiconductor element is larger than a size of the third semiconductor element. 
     
     
         29 . The light detecting device according to  claim 27 , wherein the size of the second semiconductor element is larger than a size of the third semiconductor element. 
     
     
         30 . The light detecting device according to  claim 27 , wherein the first, second, and third multilayer wiring layers include a plurality of pads, wherein the plurality of pads of the first and second multilayer wiring layers are directly bonded, and wherein the plurality of pads of the first and third multilayer wiring layers are directly bonded. 
     
     
         31 . The light detecting device according to  claim 30 , wherein the plurality of pads are directly bonded with a CuCu connection. 
     
     
         32 . The light detecting device according to  claim 27 , wherein the second section further includes an insulation film. 
     
     
         33 . The light detecting device according to  claim 32 , wherein the second and the third semiconductor elements are covered by the insulation film. 
     
     
         34 . The light detecting device according to  claim 32 , wherein the second semiconductor element other than a bonding surface is covered by the insulation film. 
     
     
         35 . The light detecting device according to  claim 32 , wherein the third semiconductor element other than a bonding surface is covered by the insulation film. 
     
     
         36 . The light detecting device according to  claim 32 , wherein at least a portion of the insulation film is disposed between the second and the third semiconductor elements in a cross-sectional view. 
     
     
         37 . The light detecting device according to  claim 27 , wherein the first semiconductor substrate includes photoelectric conversion elements configured to generate pixel signals. 
     
     
         38 . The light detecting device according to  claim 27 , wherein the second semiconductor substrate includes a first signal process circuit configured to process pixel signals. 
     
     
         39 . The light detecting device according to  claim 27 , wherein the third semiconductor substrate includes a second signal process circuit configured to process pixel signals. 
     
     
         40 . The light detecting device according to  claim 27 , wherein the second semiconductor substrate includes a memory circuit. 
     
     
         41 . The light detecting device according to  claim 27 , wherein the third semiconductor substrate includes a logic circuit. 
     
     
         42 . An imaging apparatus comprising:
 a backside illumination type solid-state imaging device that includes:
 a first section including:
 a first semiconductor element including a first semiconductor substrate at a light incident side and a first multilayer wiring layer at a opposite side of the light incident side; and 
 
 a second section including:
 a second semiconductor element including a second semiconductor substrate and a second multilayer wiring layer; and 
 a third semiconductor element including a third semiconductor substrate and a third multilayer wiring layer, 
 
 wherein the first semiconductor element and the second semiconductor element are bonded together such that the first multilayer wiring layer and the second multilayer wiring layer face each other, 
 wherein the first semiconductor element and the third semiconductor element are bonded together such that the first multilayer wiring layer and the third multilayer wiring layer face each other, and 
 wherein a size of the first semiconductor element is larger than a size of the second semiconductor element. 
   
     
     
         43 . The imaging apparatus according to  claim 42 , wherein the first semiconductor substrate includes photoelectric conversion elements configured to generate pixel signals. 
     
     
         44 . The imaging apparatus according to  claim 42 , wherein the second semiconductor substrate includes a memory circuit. 
     
     
         45 . The imaging apparatus according to  claim 42 , wherein the third semiconductor substrate includes a logic circuit. 
     
     
         46 . The imaging apparatus according to  claim 42 , wherein the size of the first semiconductor element is larger than a size of the third semiconductor element, and wherein the size of the second semiconductor element is larger than the size of the third semiconductor element.