Method and apparatus for dynamic routing using heterogeneous and disjoint networks

Abstract

Described are concepts related to the field of programmable interconnect substrates used in packaging electronics, and to stacked integrated circuits produced for application in low power and small form factor designs with fast prototyping and short mass-production cycle times. The concepts facilitate the dynamic reconfiguration of routing resources in the presence of an active system, and the tuning of routing paths to meet power and performance metrics.

We claim: 
     
         1 . An apparatus comprising:
 a first router network which is embedded in an interconnect substrate, wherein the first router network is configured to send and receive analog signals; and   a second router network which is coupled to the first router network, wherein the second router network is embedded in the interconnect substrate, wherein the second router network is configured to send and receive digital signals.   
     
     
         2 . The apparatus of  claim 1 , wherein the first router network or the second router network includes anti-fuses, pass gates, digital circuit switches, digital packet switches, and/or programmable interconnect chips. 
     
     
         3 . The apparatus of  claim 1 , wherein the first router network and the second router network are in parallel. 
     
     
         4 . The apparatus of  claim 1 , wherein the first router network includes bi-directional gates to send and receive the analog signals. 
     
     
         5 . The apparatus of  claim 1 , wherein the second router network includes uni-directional gates. 
     
     
         6 . The apparatus of  claim 1 , wherein the first router network and the second router network share a set of input ports and output ports. 
     
     
         7 . The apparatus of  claim 1 , wherein the interconnect substrate comprises a switch control circuitry and a crossbar switch coupled to the switch control circuitry. 
     
     
         8 . The apparatus of  claim 1  comprises a plurality of electrical components on the interconnect substrate. 
     
     
         9 . The apparatus of  claim 8 , wherein the plurality of electrical components includes one or more of: a processor, a memory, a sensor, or a radio. 
     
     
         10 . The apparatus of  claim 1 , wherein the first router network comprises one or more first unbuffered signal paths, wherein the second router network comprises one or more second unbuffered signal paths, and wherein an average length of the one or more first unbuffered signal paths is greater than an average length of the one or more second unbuffered signal paths. 
     
     
         11 . The apparatus of  claim 1 , wherein the interconnect substrate is on a package or board. 
     
     
         12 . A method comprising:
 forming a programmable analog routing network encompassing one or more first regions of an interconnect substrate; and   forming a programmable digital routing network encompassing one or more second regions of the interconnect substrate, wherein the one or more first regions and the one or more second regions are arranged on the interconnect substrate in a grid having columns and rows.   
     
     
         13 . The method of  claim 12 , wherein the programmable analog routing network comprises a plurality of bi-directional gates, and wherein the programmable digital routing network comprises a plurality of uni-directional gates. 
     
     
         14 . The method of  claim 12 , wherein the one or more second regions of the interconnect substrate are operable to route in at least four different directions. 
     
     
         15 . The method of  claim 12 , wherein the one or more first regions of the interconnect substrate are intermingled with the one or more second regions of the interconnect substrate. 
     
     
         16 . The method of  claim 12 , wherein the programmable analog routing network and the programmable digital routing network share a set of input ports and output ports. 
     
     
         17 . The method of  claim 12 , wherein the one or more second regions of the interconnect substrate are distributed among the one or more first regions of the interconnect substrate in a regularly repeating pattern. 
     
     
         18 . The method of  claim 17 , wherein the grid comprises one or more tiles having four rows that include three first regions of the interconnect substrate and one second region of the interconnect substrate. 
     
     
         19 . A system comprising:
 a plurality of electronic components;   an interconnect substrate, wherein the plurality of electronic components is on the interconnect substrate; and   a package or a board, wherein the interconnect substrate is on the package or the board, wherein at least one electronic component of the plurality of electronic components is coupled to a power source, wherein the interconnect substrate comprises:   a first router network which is configured to send and receive analog signals; and   a second router network which is coupled to the first router network, wherein the second router network is configured to send and receive digital signals.   
     
     
         20 . The system of  claim 19 , wherein the first router network includes bi-directional gates to send and receive the analog signals, wherein the second router network includes uni-directional gates, and wherein the first router network and the second router network share a set of input ports and output ports.