US2023019230A1PendingUtilityA1
High reliability semiconductor devices and methods of fabricating the same
Est. expiryMay 24, 2039(~12.9 yrs left)· nominal 20-yr term from priority
H10W 90/736H10W 72/07353H10W 72/352H10W 72/332H10W 72/331H10W 72/952H10W 72/932H10W 72/59H10W 72/019H10W 72/01951H10W 72/07337H10W 72/07336H10W 72/07331H10W 72/073H10W 72/321H10W 72/07352H10W 72/354H10W 72/325H10W 72/30H01L 2924/10253H01L 24/32H01L 2924/1033H01L 2924/10272H01L 2924/13064H01L 2224/29012H01L 2224/32052H01L 2924/10254H01L 2924/10156H01L 2224/29144H01L 2924/13091H01L 2224/32245H01L 2224/3207H01L 2924/35121H01L 24/29
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Claims
Abstract
A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.
Claims
exact text as granted — not AI-modified1 . A semiconductor device package, comprising:
a substrate; a die comprising a semiconductor material; and a bonding surface between the die and a surface of the substrate, wherein the bonding surface comprises a substantially planar surface extending in first and second directions, and one or more corners that are radiused or chamfered in the first and second directions.
2 . The semiconductor device package of claim 1 , wherein the one or more corners have a radius of curvature or chamfer dimension of about 100 microns to about 200 microns, or about 200 microns to about 300 microns.
3 . The semiconductor device package of claim 1 , wherein opposing edges of the bonding surface extend along a perimeter of the die at a distance of less than about 25 microns therefrom.
4 . The semiconductor device package of claim 1 , wherein the bonding surface is attached to the surface of the substrate by a die attach material, and wherein the one or more corners are configured to reduce stress at an interface between the bonding surface and the die attach material.
5 . The semiconductor device package of claim 4 , wherein an elastic modulus of the semiconductor material is greater than that of the die attach material by about 1.5 times or more.
6 . The semiconductor device package of claim 4 , wherein the bonding surface comprises a surface of the die.
7 . The semiconductor device package of claim 4 , wherein the bonding surface comprises a metal layer on a surface of the die.
8 . The semiconductor device package of claim 7 , wherein a thickness of the die is less than about 100 microns, wherein a thickness of the metal layer is less than about 10 microns, and wherein a thickness of the die attach material is less than the thickness of metal layer.
9 . The semiconductor device package of claim 7 , wherein the metal layer and/or the die attach material comprise gold (Au) or an alloy thereof, and wherein the surface of the substrate comprises a die attach pad comprising copper (Cu) or an alloy or composite thereof.
10 . The semiconductor device package of claim 7 , wherein the surface of the die including the metal layer thereon comprises radiused or chamfered corners that are aligned with the one or more corners of the bonding surface.
11 . The semiconductor device package of claim 10 , wherein the one or more corners of the die and opposing edges therebetween comprise laser-ablated corners and edges, respectively.
12 . The semiconductor device package of claim 9 , wherein the semiconductor material comprises silicon (Si), silicon carbide (SiC), or gallium nitride (GaN).
13 . A method of fabricating a semiconductor device, the method comprising:
providing a bonding surface on a die comprising a semiconductor material, wherein the bonding surface comprises a substantially planar surface extending in first and second directions, and one or more corners that are radiused or chamfered in the first and second directions.
14 . The method of claim 13 , wherein the one or more corners have a radius of curvature or chamfer dimension of about 100 microns to about 200 microns, or about 200 microns to about 300 microns.
15 . The method of claim 13 , wherein opposing edges of the bonding surface extend along a perimeter of the die at a distance of less than about 25 microns therefrom.
16 . The method of claim 13 , wherein providing the bonding surface comprises:
singulating the die from a semiconductor wafer using a laser ablation process to define a surface of the die as the bonding surface having the one or more corners that are radiused or chamfered.
17 . The method of claim 16 , wherein the laser ablation process comprises a greater duration of lasing at the one or more corners of the die than at opposing edges thereof.
18 . The method of claim 13 , wherein providing the bonding surface comprises:
singulating the die from a semiconductor wafer using a laser ablation process to define a surface of the die having laser-ablated corners that are radiused or chamfered; and forming a metal layer on a surface of the die as the bonding surface having the one or more corners that are aligned with the laser-ablated corners.
19 . The method of claim 18 , wherein the metal layer is a backside metallization layer that defines a contact area between the die and a package substrate.
20 . A method of fabricating a semiconductor device, the method comprising:
forming a metal layer on a semiconductor wafer; and patterning the metal layer to define respective bonding surfaces on portions of the semiconductor wafer corresponding to respective semiconductor dies, wherein scribe lines of the semiconductor wafer between the respective semiconductor dies are free of the metal layer or have a reduced thickness of the metal layer thereon relative to the portions of the wafer corresponding to the respective semiconductor dies.
21 . The method of claim 20 , wherein forming the metal layer comprises:
forming a mask on the scribe lines of the semiconductor wafer; and performing a sputtering or plating process to selectively deposit the metal layer on areas of the semiconductor wafer that are exposed by the mask such that the scribe lines of the semiconductor wafer are free of the metal layer.
22 . The method of claim 20 , further comprising:
singulating the respective semiconductor dies from the semiconductor wafer using a mechanical dicing process along the scribe lines.
23 . The method of claim 20 , wherein the respective bonding surfaces comprise opposing edges that extend along a perimeter of the respective semiconductor dies at a distance of less than about 25 microns therefrom.
24 . The method of claim 20 , wherein the respective bonding surfaces comprise one or more non-orthogonal corners.
25 . The method of claim 24 , wherein the respective bonding surfaces comprise a substantially planar surface extending in first and second directions, and the one or more non-orthogonal corners are radiused or chamfered in the first and second directions.Cited by (0)
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