3d heterogeneous integrations and methods of making thereof
Abstract
An integrated circuit package comprising one or more electronic component(s); a first substrate including a first surface and a second surface of the first substrate; and a second substrate including a first surface and a second surface of the second substrate. The first substrate including a first first-substrate cavity on the first surface of the first substrate. The second substrate includes a first second-substrate cavity on the first surface of the second substrate. The second surface of the first substrate and the second surface of the second substrate is located between the first surface of the first substrate and the first surface of the second substrate; or the first surface of the first substrate and the first surface of the second substrate is located between the second surface of the first substrate and the second surface of the second substrate.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An integrated circuit package comprising:
one or more component(s); and one or more substrate(s), wherein said one or more substrate(s) including a first substrate and a second substrate, said first substrate including a first surface of said first substrate and a second surface of said first substrate, said second substrate including a first surface of said second substrate and a second surface of said second substrate, said first substrate including a first first-substrate cavity on the first surface of said first substrate, said second substrate includes a first second-substrate cavity on the first surface of said second substrate, said second surface of said first substrate and said second surface of said second substrate is located between said first surface of said first substrate and the first surface of said second substrate, and said one or more component(s) is/are disposed inside said first first-substrate cavity of first substrate and/or said first second-substrate cavity of second substrate.
2 . The integrated circuit package according to claim 1 , wherein
one of said one or more component(s) is electrically and/or optically coupled to said one or more substrate(s) using a flip chip or a wirebond method or a waveguide.
3 . The integrated circuit package according to claim 1 , wherein
said one or more substrate(s) comprises of waveguide(s) and/or nanowires.
4 . The integrated circuit package according to claim 1 , wherein
one of said one or more component(s) is a power management/regulator or power device or security sub-circuit or tamper detect circuit or router or switch or antenna or radar or phased array or modem or baseband or transceiver or mm-wave subsystem or silicon-on-insulator or amplifier or Field Programmable Gate Array (FPGA) or capacitor or resistor or inductor or processor or memory or sensor or analog-to-digital converter or digital-to-analog converter or electrical-optical converter or optical-electrical converter or Light Emitting Diode (LED) or micro LED or Application-Specific Integrated Circuit (ASIC) or Through-Silicon Via (TSV) or laser or analog circuit or digital circuit or Serializer/Deserializer (SerDes) or filter or Lens or Graphics Processing Unit (GPU) or magnet or waveguide or wirebond or epoxy mold compound (EMC) or under-fill material or heat-pipe or mirror or fan or bump or fiber or accelerator/co-processor or processor core or nanowire or Microelectromechanical Systems (MEMS) or membrane or heat spreader or energy source or sensing material or piezoelectric or light source or touch screen or display or Liquid Crystal Display (LCD) or organic light-emitting diode (OLED) or battery or Electromagnetic Shield (EMI) coating.
5 . The integrated circuit package according to claim 1 , wherein
one of said one or more component(s) is/are stacked component(s).
6 . The integrated circuit package according to claim 1 , wherein
one of said one or more substrate(s) is a semiconductor.
7 . An integrated circuit package comprising:
one or more component(s); and one or more substrate(s), wherein said one or more substrate(s) including a first substrate and a second substrate, said first substrate including a first surface of said first substrate and a second surface of said first substrate, said second substrate including a first surface of said second substrate and a second surface of said second substrate, said first substrate including a first first-substrate cavity on the first surface of said first substrate, said second substrate includes a first second-substrate cavity on the first surface of said second substrate, said first surface of said first substrate and the first surface of said second substrate is located between said second surface of said first substrate and said second surface of said second substrate, and said one or more component(s) is/are disposed inside said first first-substrate cavity of first substrate and/or said first second-substrate cavity of second substrate.
8 . The integrated circuit package according to claim 7 , wherein
one of said one or more component(s) is electrically and/or optically coupled to said one or more substrate(s) using a flip chip or a wirebond method or a waveguide.
9 . The integrated circuit package according to claim 7 , wherein
said one or more substrate(s) comprises of waveguide(s) and/or nanowires.
10 . The integrated circuit package according to claim 7 , wherein
one of said one or more component(s) is a power management/regulator or power device or security sub-circuit or tamper detect circuit or router or switch or antenna or radar or phased array or modem or baseband or transceiver or mm-wave subsystem or silicon-on-insulator or amplifier or Field Programmable Gate Array (FPGA) or capacitor or resistor or inductor or processor or memory or sensor or analog-to-digital converter or digital-to-analog converter or electrical-optical converter or optical-electrical converter or Light Emitting Diode (LED) or micro LED or Application-Specific Integrated Circuit (ASIC) or Through-Silicon Via (TSV) or laser or analog circuit or digital circuit or Serializer/Deserializer (SerDes) or filter or Lens or Graphics Processing Unit (GPU) or magnet or waveguide or wirebond or epoxy mold compound (EMC) or under-fill material or heat-pipe or mirror or fan or bump or fiber or accelerator/co-processor or processor core or nanowire or Microelectromechanical Systems (MEMS) or membrane or heat spreader or energy source or sensing material or piezoelectric or light source or touch screen or display or Liquid Crystal Display (LCD) or organic light-emitting diode (OLED) or battery or Electromagnetic Shield (EMI) coating.
11 . The integrated circuit package according to claim 7 , wherein
one of said component(s) is/are stacked component(s).
12 . The integrated circuit package according to claim 7 , wherein
one of said one or more substrate(s) is a semiconductor.
13 . An integrated circuit package comprising:
one or more component(s); and one or more substrate(s), wherein said one or more substrate(s) including a first substrate, a second substrate and a third substrate, wherein said first substrate including a first surface of said first substrate and a second surface of said first substrate, said second substrate including a first surface of said second substrate and a second surface of said second substrate, said first substrate including a first first-substrate cavity on the first surface of said first substrate, said second substrate includes a first second-substrate cavity on the first surface of said second substrate, said first surface of said first substrate and the first surface of said second substrate is located between said second surface of said first substrate and said second surface of said second substrate,
said third substrate is coupled to said first substrate and/or said second substrate, and
said one or more component(s) is/are disposed inside said first first-substrate cavity of first substrate and/or said first second-substrate cavity of second substrate.
14 . The integrated circuit package according to claim 13 , wherein
one of said one or more component(s) is electrically and/or optically coupled to said one or more substrate(s) using a flip chip or a wirebond method or a waveguide.
15 . The integrated circuit package according to claim 13 , wherein
said one or more substrate(s) comprises of waveguide(s) and/or nanowires.
16 . The integrated circuit package according to claim 13 , wherein
one of said one or more substrate(s) is a semiconductor.
17 . The integrated circuit package according to claim 13 , wherein
one of said one or more component(s) is a power management/regulator or power device or security sub-circuit or tamper detect circuit or router or switch or antenna or radar or phased array or modem or baseband or transceiver or mm-wave subsystem or silicon-on-insulator or amplifier or Field Programmable Gate Array (FPGA) or capacitor or resistor or inductor or processor or memory or sensor or analog-to-digital converter or digital-to-analog converter or electrical-optical converter or optical-electrical converter or Light Emitting Diode (LED) or micro LED or Application-Specific Integrated Circuit (ASIC) or Through-Silicon Via (TSV) or laser or analog circuit or digital circuit or Serializer/Deserializer (SerDes) or filter or Lens or Graphics Processing Unit (GPU) or magnet or waveguide or wirebond or epoxy mold compound (EMC) or under-fill material or heat-pipe or mirror or fan or bump or fiber or accelerator/co-processor or processor core or nanowire or Microelectromechanical Systems (MEMS) or membrane or heat spreader or energy source or sensing material or piezoelectric or light source or touch screen or display or Liquid Crystal Display (LCD) or organic light-emitting diode (OLED) or battery or Electromagnetic Shield (EMI) coating.
18 . The integrated circuit package according to claim 13 , wherein
one of said component(s) is/are stacked component(s).
19 . The integrated circuit package according to claim 13 , wherein
one or more nanowire is coupled to said component(s) and/or said substrate(s) and/or said cavity(ies).
20 . The integrated circuit package according to claim 7 , wherein
one or more nanowire is coupled to said component(s) and/or said substrate(s) and/or said cavity(ies).Join the waitlist — get patent alerts
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