Semiconductor device and method

Abstract

An embodiment includes a device having a first set of nanostructures on a substrate, the first set of nanostructures including a first channel region, a second set of nanostructures on the substrate, the second set of nanostructures including a second channel region, a gate dielectric layer wrapping around each of the first and second sets of nanostructures, a first work function tuning layer on the gate dielectric layer of the first set of nanostructures, the first work function tuning layer wrapping around each of the first set of nanostructures, a glue layer on the first work function tuning layer, the glue layer wrapping around each of the first set of nanostructures, a second work function tuning layer on the glue layer of the first set of nanostructures and on the gate dielectric layer of the second set of nanostructures, and a fill layer on the second work function tuning layer.

What is claimed is: 
     
         1 . A device comprising:
 a first set of nanostructures on a substrate, the first set of nanostructures comprising a first channel region;   a second set of nanostructures on the substrate, the second set of nanostructures comprising a second channel region;   a gate dielectric layer wrapping around each of the first and second sets of nanostructures;   a first work function tuning layer on the gate dielectric layer of the first set of nanostructures, the first work function tuning layer wrapping around each of the first set of nanostructures, the first work function tuning layer comprising an n-type work function metal;   a glue layer on the first work function tuning layer, the glue layer wrapping around each of the first set of nanostructures;   a second work function tuning layer on the glue layer of the first set of nanostructures and on the gate dielectric layer of the second set of nanostructures, the second work function tuning layer comprising a p-type work function metal, the p-type work function metal different from the n-type work function metal; and   a fill layer on the second work function tuning layer.   
     
     
         2 . The device of  claim 1 , wherein the glue layer comprises titanium nitride, titanium aluminum carbide, tantalum aluminum carbide, silicon-doped tantalum aluminide. 
     
     
         3 . The device of  claim 1  further comprising:
 a protective layer between the first work function tuning layer and the glue layer on the first set of nanostructures, the protective layer wrapping around each of the first set of nanostructures. 
 
     
     
         4 . The device of  claim 3 , wherein the protective layer comprises amorphous silicon. 
     
     
         5 . The device of  claim 4 , wherein the glue layer separates and fills an area between respective portions of the protective layer on adjacent nanostructures of the first set of nanostructures. 
     
     
         6 . The device of  claim 1 , wherein the glue layer separates and fills an area between respective portions of the first work function tuning layer on adjacent nanostructures of the first set of nanostructures. 
     
     
         7 . The device of  claim 1 , wherein the second work function tuning layer separates and fills an area between respective portions of the gate dielectric layer on adjacent nanostructures of the second set of nanostructures. 
     
     
         8 . The device of  claim 1 , wherein the fill layer does not extend between adjacent nanostructures of the second set of nanostructures. 
     
     
         9 . A device comprising:
 a first set of nanostructures on a substrate, the first set of nanostructures comprising a first channel region;   a second set of nanostructures on the substrate, the second set of nanostructures comprising a second channel region;   a gate dielectric layer wrapping around each of the first and second sets of nanostructures;   a first work function tuning layer on the gate dielectric layer of the first set of nanostructures, the first work function tuning layer wrapping around each of the first set of nanostructures;   a protective layer on the first work function tuning layer, the protective layer wrapping around each of the first set of nanostructures;   a second work function tuning layer over the protective layer of the first set of nanostructures and over the gate dielectric layer of the second set of nanostructures, the second work function tuning layer having a different material composition than the first work function tuning layer; and   a fill layer on the second work function tuning layer.   
     
     
         10 . The device of  claim 9 , wherein the protective layer comprises amorphous silicon. 
     
     
         11 . The device of  claim 9  further comprising:
 a glue layer between the protective layer and the second work function tuning layer on the first set of nanostructures, the glue layer wrapping around each of the first set of nanostructures. 
 
     
     
         12 . The device of  claim 11 , wherein the glue layer comprises titanium nitride, titanium aluminum carbide, tantalum aluminum carbide, silicon-doped tantalum aluminide. 
     
     
         13 . The device of  claim 11 , wherein the glue layer separates and fills an area between respective portions of the protective layer on adjacent nanostructures of the first set of nanostructures. 
     
     
         14 . The device of  claim 9 , wherein the second work function tuning layer separates and fills an area between respective portions of the gate dielectric layer on adjacent nanostructures of the second set of nanostructures. 
     
     
         15 . The device of  claim 9 , wherein the fill layer does not extend between adjacent nanostructures of the second set of nanostructures. 
     
     
         16 . The device of  claim 9 , wherein the fill layer does not extend between adjacent nanostructures of the first set of nanostructures. 
     
     
         17 . A device comprising:
 a first set of nanostructures on a substrate;   a second set of nanostructures on the substrate;   a gate dielectric layer wrapping around each of the first and second sets of nanostructures;   a first work function tuning layer on the gate dielectric layer of the first set of nanostructures, the first work function tuning layer wrapping around each of the first set of nanostructures, the first work function tuning layer comprising an n-type work function metal;   a glue layer on the first work function tuning layer;   a second work function tuning layer on the glue layer of the first set of nanostructures and on the gate dielectric layer of the second set of nanostructures; and   a fill layer on the second work function tuning layer, wherein the fill layer does not extend between adjacent nanostructures of the second set of nanostructures, and wherein the fill layer does not extend between adjacent nanostructures of the first set of nanostructures.   
     
     
         18 . The device of  claim 17 , wherein the first work function tuning layer comprises an n-type work function metal, the second work function tuning layer comprises a p-type work function metal, and the p-type work function metal is different from the n-type work function metal. 
     
     
         19 . The device of  claim 17  further comprising:
 a amorphous silicon layer between the first work function tuning layer and the glue layer on the first set of nanostructures, the amorphous silicon layer wrapping around each of the first set of nanostructures. 
 
     
     
         20 . The device of  claim 19 , wherein the glue layer comprises titanium nitride, titanium aluminum carbide, tantalum aluminum carbide, silicon-doped tantalum aluminide.