Power semiconductor device with forced carrier extraction and method of manufacture

Abstract

This disclosure relates to semiconductor devices, and, more particularly, to a semiconductor structure that improves the switching speed of a switch for which the turn-off process depends on the recombination speed of charge carriers. The disclosure describes a semiconductor device formed on a semiconductor substrate that includes a power semiconductor switch having a drift region in the semiconductor substrate, an Extraction Plug in electrical contact with the drift region of the power semiconductor switch, and an extraction device electrically coupled to the Extraction Plug. The extraction device is structured to remove charge carriers from the drift region through the Extraction Plug when the extraction device is turned on. Methods are also described.

What is claimed is: 
     
         1 . A semiconductor device formed on a semiconductor substrate, the semiconductor device comprising:
 a semiconductor switch comprising a first conduction electrode disposed on a top side of the substrate and a drift region disposed between the first conduction electrode and a bottom side of the substrate, the semiconductor switch configured to employ conductivity modulation in the drift region;   a deep trench disposed in the substrate and extending into the drift region;   an extraction plug providing a low resistance electrical path to a lower area of the drift region, the lower area of the drift region being disposed adjacent to the bottom of the deep trench;   an insulator disposed within the deep trench and configured to isolate the extraction plug from a portion of the semiconductor switch disposed above the lower area of the drift region;   an extraction device electrically coupled to the extraction plug, and configured to be turned on when the power semiconductor switch is turned off, to be turned off when the power semiconductor switch is turned on, and to remove charge carriers from the drift region through the extraction plug when turned on.   
     
     
         2 . A semiconductor device of  claim 1 , wherein the semiconductor switch further comprises a second conduction terminal disposed on the bottom side of the substrate. 
     
     
         3 . A semiconductor device of  claim 1 , wherein the semiconductor switch further comprises a second conduction terminal disposed on the top side of the substrate. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the extraction plug comprises a contact disposed at the bottom of the deep trench, and a conductive trace electrically coupled to the contact and disposed within the trench to create an electrical path from the top to the bottom of the trench. 
     
     
         5 . The semiconductor device of  claim 4 , wherein the contact includes metal, doped polysilicon, or both. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the extraction plug comprises a contact formed at the top side of the substrate. 
     
     
         7 . The semiconductor device of  claim 1 , wherein a conductivity of the extraction device is controlled according to a voltage supplied to a control terminal. 
     
     
         8 . The semiconductor device of  claim 7 , wherein the extraction device comprises a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), and wherein the control terminal of the extraction device corresponds to a gate of the MOSFET. 
     
     
         9 . The semiconductor device of  claim 8 , wherein a gate oxide of the MOSFET is configured to provide a breakdown voltage higher than a blocking voltage of the semiconductor switch. 
     
     
         10 . The semiconductor device of  claim 8 , wherein a gate oxide of the MOSFET comprises a plurality of layers of respective dielectrics. 
     
     
         11 . The semiconductor device of  claim 8 ,
 wherein the semiconductor switch further comprises a gate disposed on the top side of the substrate; and   wherein the gate of the extraction device is electrically coupled to the gate of the semiconductor switch, a first conduction terminal is electrically coupled to the extraction plug, and a second conduction terminal of the extraction device is electrically coupled to a second conduction terminal of the semiconductor switch.   
     
     
         12 . The semiconductor device of  claim 8 , wherein the semiconductor switch comprises an n-channel Insulated Gate Bipolar Transistor, and
 wherein the MOSFET is a p-channel MOSFET.   
     
     
         13 . The semiconductor device of  claim 8 , wherein the MOSFET is a vertical MOSFET. 
     
     
         14 . The semiconductor device of  claim 8 , wherein the MOSFET is a lateral MOSFET. 
     
     
         13 . The semiconductor device of  claim 1 , further comprising:
 an active area,   wherein the semiconductor switch is disposed in the active area, and   wherein the extraction plug is disposed outside the active area.   
     
     
         16 . The semiconductor device of claim  15 , further comprising:
 a high voltage termination,   wherein the active area is disposed within the high voltage termination, and   wherein the extraction plug is disposed on the top side of the substrate and outside of the high voltage termination.   
     
     
         17 . The semiconductor device of  claim 1 , wherein the extraction device is disposed on the top side of the semiconductor substrate. 
     
     
         18 . The semiconductor device of  claim 1 , wherein the extraction device is disposed on an insulator substrate. 
     
     
         19 . The semiconductor device of  claim 1 , wherein the drift region of the semiconductor switch comprises doped silicon. The semiconductor device of  claim 1 , wherein the drift region of the semiconductor switch comprises a doped wide-bandgap semiconductor.