Data management method and system for random access electron beam memory

Abstract

A data recording and readback subsystem for digital computer systems employing random access electron beam memories having an electron beam write/read apparatus for recording data to be stored on a recording member that is subject to fatigue in the eventuality of excessive write/read storage operations at any given physical location on the recording member. The improved method and apparatus for data management comprising systematically permuting the physical location of data stored on the recording member, recording each permutation of the data, deriving signals representative of the number of permutation operations, and combining programmer initiated requests from the computer system central processing unit for data stored in the electron beam memory with the signals representative of the number of permutations to derive an actual physical address signal for application to the electron beam memory for recovery of the requested data.

What is claimed is: 
     
       1. In a data recording and readback subsystem for digital computer systems having a central processing unit and employing a random access electron beam memory having an electron beam write/read apparatus for recording data to be stored on a recording member that is subject to fatique in the eventuality of excessive write/read data storage operations at given physical location on the recording member; the method of data management comprising systematically permuting the physical location of data stored on the recording member, recording the occurrence of each permutation of the data, deriving signals representative of the total number of permutations, and combining programmer initiated requests from the computer system central processing unit for data stored in the electron beam memory with the signals representative of the total number of permutations to derive an actual physical address signal for application to the electron beam memory for recovery of the requested data stored therein. 
     
     
       2. The method according to claim 1 wherein the systematic permutation of stored data physical locations is in accordance with a predetermined algorithm conditionally responsive to the number of accesses to the electron beam memory. 
     
     
       3. The method according to claim 1 in a data recording and readback system that further includes an associative memory and a cache memory of limited capacity, the associative memory being interposed in the system intermediate the computer system central processing unit and the electron beam memory, and the cache memory being connected to the associative memory and to the electron beam memory and having its output connected to supply data back to the central processing unit, said method further comprising supplying requests for data from the central processing unit to the associative memory, checking the associative memory against the addresses stored in the cache memory to determine if the desired data is stored in the cache memory; provided the desired data is stored in the cache memory, non-destructively transferring the desired data to the central processing unit to thereby satisfy the request; provided the desired data is not stored in the cache memory, non-destructively transferring the desired data from the electron beam memory to the cache memory and thereafter non-destructively transferring the desired data from the cache memory to the central processing unit in reply to the request, the data transferred from the electron beam memory to the cache memory being stored in the cache memory at the top of a push-down list with data previously stored in the cache memory at the bottom of the push-down list being discarded. 
     
     
       4. In a data recording and readback system for a random access electron beam memory having an electron beam write/read apparatus for recording data to be stored on a recording member that is subject to fatique in the eventuality of excessive write/read storage accesses to any given physical location on the recording member, said system including a central processing unit; the improvement comprising location permuting means for systematically permuting the physical location of data stored on the recording member, permutation recording means responsive to said location permuting means for recording the total number of permutations of the data physical locations, and address mapping means responsive to input addresses of requests for data and to said permutation recording means and connected to control the operation of said electron beam write/read apparatus for translating input addresses for requested data from the central processing unit to the address of the physical location where the requested data actually is physically recorded on the recording member for retrieval. 
     
     
       5. A system according to claim 4 wherein the location permuting means includes permutation signal generating means coupled to said electron beam memory for supplying thereto a data permutation signal for systematically permuting the physical location of data recorded on the memory plane in accordance with a predetermined algorithm, said permutation signal generating means being conditionally responsive to the number of accesses to the electron beam memory. 
     
     
       6. A system according to claim 5 wherein the permutation recording means comprises a number of permutations counter coupled to the output from said permutation signal generating means for deriving a signal P (modulo N) representative of the number of permutation passes started since time t = 0 when the memory first was placed in operation for supply to the address mapping means, N being determined by the number of memory plane useable addresses plus one, and a blank space location counter means for deriving a signal R representative of the physical address of an empty data block for supply to the address mapping means, said number of permutations counter and said blank space location counter means being responsive to the output from said permutation signal generating means. 
     
     
       7. A system according to claim 6 wherein the address mapping means comprises an adder (modulo N), a comparator means and a subtractor (1), said adder (modulo N) having the programmed address A of requested data stored in the electron beam memory supplied from the central processing unit applied thereto as an input along with the signal P (modulo N) from the number of permutations counter and deriving at its output an output signal A" = A + P (modulo N) for supply as one input to the comparator means, means supplying the physical address of the empty data block signal R to a second input of the comparator means, means for supplying an output signal A' from one output of the comparator means directly to the electron beam memory for accessing the requested data under conditions where A" greater than R (A" > R) and A' = A", and means for supplying an output signal A' from a second output of the comparator connected through the subtractor (1) to the electron beam memory for accessing the requested data under conditions where A" is equal to or less than R (A" ≦ R) and A' = A" - 1 where A' is the actual physical address of the data requested by the programmer via the central processing unit. 
     
     
       8. A system according to claim 4 further including an associative memory interposed in the system intermediate the central processing unit and the address mapping means, and a cache memory connected to the associative memory and to the electron beam memory in parallel with the address mapping means and having its output connected to supply data to the central processing unit, said associative memory serving to compare incoming requests for data from the central processing unit to the addresses stored in the cache memory, means responsive to the presence of the requested data in the cache memory for non-destructively transferring the requested data to the central processing unit to reply to the request, means responsive to the absence of the requested data in the cache memory for non-destructively transferring the requested data from the electron beam memory to the top of a push-down list of data stored in the cache memory, means for discarding data stored in the cache memory at the bottom of the push-down list to make room for the new incoming data to be stored at the top of the push-down list, and means for non-destructively transferring the requested data just stored in the cache memory to the central processing unit in reply to the request. 
     
     
       9. A system according to claim 7 further including an associative memory interposed in the system intermediate the central processing unit and the address mapping means, and a cache memory connected to the associative memory and to the electron beam memory in parallel with the address mapping means and having its output connected to supply data to the central processing unit, said associative memory serving to compare incoming requests for data from the central processing unit to the addresses stored in the cache memory, means responsive to the presence of the requested data in the cache memory for non-destructively transferring the requested data to the central processing unit in reply to the request, means responsive to the absence of the requested data in the cache memory for non-destructively transferring the requested data from the electron beam memory to the top of a push-down list of data stored in the memory cache, means for discarding data stored in the cache memory at the bottom of the push-down list to make room for the new incoming data to be stored at the top of the push-down list, and means for non-destructively transferring the requested data just stored in the cache memory to the central processing unit in reply to the request.