Differential circuit

Abstract

A differential circuit, such as a comparator circuit or an operational amplifier circuit, including an output-error preventing circuit having an npn transistor and a constant voltage source. The output of the differential circuit is kept at the correct value corresponding to the difference of two inputs of the differential circuit, even if one of the two inputs becomes negative.

We claim: 
     
       1. A differential circuit operatively connected to receive first and second input signals having potentials, comprising: a differential stage having first and second transistors for receiving the first and second input signals, respectively, said differential stage comparing the potentials of the first and second input signals to provide an output corresponding to a state of said second transistor;   a control stage having a control transistor operatively connected to said differential stage, said control transistor being driven by the output of said differential stage;   an output stage including an output transistor operatively connected to said control transistor, said output transistor having a base carrying a base current, the base current of said output transistor being controlled by said control transistor; and   error-output preventing means, operatively connected between said differential stage and said control stage, including an error-output preventing transistor, said error-output preventing transistor becoming on when the potential of the second input signal becomes lower than a predetermined value, so as to keep said output transistor at a state corresponding to the relation of the potentials of the first and second input signals even if the potential of the second input signal becomes lower than the predetermined value.   
     
     
       2. A differential circuit as defined in claim 1, wherein said differential circuit is operatively connected to a voltage supply and a constant voltage source, and wherein said output transistor comprises a first npn transistor of the open-collector output type and wherein said error-output preventing transistor comprises a second npn transistor, the collector of said second npn transistor being operatively connected to said second transistor, the emitter of said second npn transistor being operatively connected to the base of said first npn transistor, and said constant voltage source being operatively connected between the base of said error output preventing transistor and the voltage supply. 
     
     
       3. A differential circuit as defined in claim 1, operatively connectable to a voltage supply, wherein said control transistor has a collector, said output transistor comprises a first npn transistor and said output stage further comprises a first pnp transistor, said first npn and pnp transistors being operatively connected in series between the voltage supply and ground so that the output of said differential circuit is changed linearly, wherein said error-output preventing transistor is a second npn transistor and wherein said error-output preventing means further comprises a third npn transistor and first and second constant voltage sources, the collector of said second npn transistor operatively connected to said second transistor, the emitter of said second npn transistor operatively connected to the emitter of said third npn transistor, the collector of said third npn transistor operatively connected to the collector of said control transistor, said first constant voltage source operatively connected between the base of said second npn transistor and ground, and said second constant voltage source operatively connected between the base of said third npn transistor and ground. 
     
     
       4. A differential circuit operatively connected to receive first and second input signals having potentials, comprising: first and second transistors forming a differential stage, operatively connected to receive the first and second input signals, respectively, for comparing the potential difference between the first and second input signals and providing an output signal in response to the difference between the first and second input signals;   a control transistor, operatively connected to said differential stage, said control transistor being driven by the output signal of said differential stage;   an output transistor, operatively connected to said control transistor, said output transistor having a base current, the base current of said output transistor being controlled by said control transistor; and   an error-output preventing transistor, operatively connected between said differential stage and said control transistor, for controlling said output transistor in dependence upon the potential difference between the first and second input signals even when the potential of the second input signal becomes lower than a predetermined value.