Character display system

Abstract

A cathode ray tube of long persisting time has a control unit operably associated with a central processing unit and a CRT controller wherein the control unit generates signals to select data bus and memory access. A video inhibit signal is generated for a predetermined period of time by the control unit to avoid or prevent flicker or flashing on the screen during refreshing thereof.

We claim: 
     
       1. A device for displaying characters on a screen of a CRT, comprising a CRT having long persistence time,   memory means for storing display data and accessible for refreshing the CRT screen,   microprocessor means connected with the memory means for accessing thereof in response to input information,   CRT controller means for accessing said memory means to refresh images of data displayed on the CRT screen,   signal generating means connected with the memory means for converting display information data into serial data, and   control means connected with the memory means for signalling access thereto by the microprocessor means and for sending a video inhibit signal to the signal generating means, the video inhibit signal being maintained for a predetermined period of time after access is requested by the microprocessor means to inhibit video signals from being sent by the signal generating means.   
     
     
       2. The device of claim 1 wherein the memory means is a refresh memory for storing read and write data to be displayed. 
     
     
       3. The device of claim 1 wherein said microprocessor means is a central processing unit having priority over said CRT controller means to said memory means. 
     
     
       4. The device of claim 1 including parallel-to-serial converting means and wherein said signal generating means is a character generator coupled to the converting means for outputting display information. 
     
     
       5. The device of claim 1 including a multiplexer coupled to said microprocessor means and to said CRT controller means and accessed by said control means for selecting control of display data from said memory means by said control means. 
     
     
       6. The device of claim 1 wherein said memory means is a refresh memory for storing data and accessible by both the microprocessor means and the CRT controller means. 
     
     
       7. The device of claim 1 wherein the memory means includes a latch circuit for storing data accessible for display. 
     
     
       8. A CRT display device including refresh memory means for storing data to be displayed,   microprocessor means for accessing said refresh memory means for data to be displayed,   CRT controller means for accessing said refresh memory means to refresh images of data displayed on the screen of the CRT,   means for controlling access to the refresh memory means by the microprocessor means and the CRT controller means,   video signal generating means for producing output video signals dependent upon the data to be displayed, and a   CRT of long persistence light-emission time for displaying images on the screen in accordance with the video signals, said access controlling means operable with said microprocessor means to enable same to periodically read out data from said memory means wherein request for access to the refresh memory means by the microprocessor means enables priority thereto over the CRT controller means and outputs a video inhibit signal to the video signal generating means to prevent output of video signals thereby for a predetermined period of time.   
     
     
       9. The CRT display device of claim 8 wherein the microprocessor means is a central processing unit having priority over the CRT controller means to access of the memory means. 
     
     
       10. The CRT display device of claim 8 wherein the signal generating means is a character generator coupled to a converter outputting information. 
     
     
       11. The CRT display device of claim 8 including a multiplexer coupled to the microprocessor means and to the CRT controller means and accessed by the access controlling means for selecting control of display data from the memory means by said access controlling means. 
     
     
       12. The CRT display device of claim 8 wherein the memory means includes a latch circuit for storing data accessible for display. 
     
     
       13. The CRT display device of claim 8 including a converter coupled to the generating means for converting a pattern signal into a serial video signal. 
     
     
       14. The CRT display device of claim 8 including gating means for coupling the microprocessor means and the memory means for access thereto. 
     
     
       15. A character display system including a CRT of long persistence light-emission time for displaying images on the screen thereof,   memory means for storing data to be displayed, a   central processing unit operably associated for accessing the memory means, a   CRT controller operably associated for accessing the memory means to refresh images of data displayed on the screen of the CRT,   control means for selecting access to the memory means by the central processing unit and the CRT controller, and   generating means for producing output video signals dependent upon character data to be displayed, said control means operable to permit the CRT controller to read out data from the memory means and upon request from the central processing unit to enable such unit to access the memory means in preference over the CRT controller and to output a video inhibit signal to the generating means for a predetermined period of time and preventing output of video signals therefrom for such time.   
     
     
       16. The character display system of claim 15 wherein the memory means comprises a refresh memory for storing read and write data to be displayed and accessible by the CRT controller and by the central processing unit. 
     
     
       17. The character display system of claim 15 including parallel to serial converting means and wherein the generating means is a character generator coupled thereto and to the memory means and the converting means provides outputting of video signals to the CRT.