Reference voltage generator using a charging and discharging circuit
Abstract
There is disclosed a circuit for generating a reference voltage including first means for lowering the the input bias below an externally applied voltage and reducing first the variation of the voltage level due to the applied voltage, second means for causing the flow of a current depending on the output of said first means to sense the applied voltage state and generating the reference voltage increased by the amount of voltage dropped through the resistance produced according to said current flow to the output terminal of said reference voltage when a fixed constant voltage is applied, and third means for charging and discharging a part of the applied current according to the applied voltage variation of said second means.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. In a network having resistance elements and diodes between an external voltage supply terminal and a ground terminal, a circuit comprising: first means producing an output for lowering input bias below an externally applied voltage and reducing the level of variation due to the applied voltage; second means for causing a current flow in dependence upon the output of said first means to sense the state of said applied voltage and generating a reference voltage increased by the amount of voltage dropped through resistance according to said current flow to an output terminal of said reference voltage when a fixed constant voltage is applied; and third means for charging and discharging a part of the applied current according to the applied voltage variation of said second means.
2. A circuit as claimed in claim 1, wherein said third means comprises a resistance circuit and a diode so that, depending on the variation of the applied voltage, when the voltage of a node of the second means is low, said node is charged with an additional current, and when the voltage of said node is high, said node is discharged, thereby generating a constant said reference voltage irrespective of the applied voltage.
3. A circuit having resistance elements and diodes coupled between an external voltage supply terminal and a reference potential terminal, for generating a reference voltage, comprising: first means for producing an output by lowering an input bias voltage to a value below an externally applied voltage; second means for producing a current flow in dependence upon the output of said first means to sense the state of said applied voltage, and for generating at an output terminal a reference voltage increased by a voltage drop through resistance to said current flow to said output terminal; and third means for charging and discharging a part of said current flow in accorance with variations of said applied voltage.
4. The circuit of claim 3, wherein said third means comprises a resistance stage and a diode, whereby when voltage at a node of said second means is low, an additional current is added to said current flow via said node, and when voltage at said node is high, part of said current flow is discharged via said node.
5. A circuit for generating a reference voltage, comprising: first means coupled between an external voltage terminal and a reference potential terminal, for responding to an externally applied voltage at said external voltage terminal by lowering a first voltage drop to a value below said externally applied voltage to produce an output; second means coupled between said external voltage terminal and said reference potential terminal and driven by said output, for providing a current flow to generate a reference voltage equal to the sum of a second voltage drop due to said current flow and a constant voltage; and third means coupled between said external voltage terminal and said reference potential terminal, for supplementing said current flow when a first node voltage of said second means is lower than a second node voltage of said third means and for dissipating said current flow when said second node voltage is lower than said first node voltage.
6. The circuit of claim 5, when said third means comprises a resistance and a diode.
7. A circuit for generating a reference voltage, comprising: a first resistance stage coupled to an external voltage terminal; a second resistance stage forming a first node with said first resistance stage, coupled to said external reference terminal, and exhibiting a voltage drop having a value lower than a voltage externally applied to said external voltage terminal; first potential means coupled between said second resistance and a reference potential terminal, for providing a first constant voltage; second potential means coupled to said reference potential terminal, for providing a second constant voltage at a second node; first resistance means coupled to said external voltage terminal and to said first node, for providing a fixed first resistance component; second resistance means coupled between said first and second nodes and a third node formed with said first resistances and having second and third resistance components, for providing a reference potential equal to the sum of a voltage drop due to current flow through said second and third resistance components and said second constant voltage, at a fourth node intermediate said second and third resistance components; third potential means coupled to said reference potential terminal, for providing a third constant voltage at said third node; and third resistance means coupled between said external voltage terminal and said third node, for providing a fixed second resistance component.
8. The circuit of claim 7, wherein said third resistance means comprises a resistance stage and said third potentials means comprises a diode, whereby when voltage at said third node is low, an additional current is added to said current flow via said third node, and when voltage at said third node is high, part of said current flow is discharged via said third node.
9. The circuit for generating a reference voltage, comprising: the first transistor having a gate electrode coupled to an applied voltage terminal and conduction electrodes coupled between said applied voltage terminal and the first node; the second transistor having a gate electrode coupled to a second node and conduction electrodes coupled between said first and second nodes; a plurality of third transistors having gate electrodes coupled to said applied voltage terminal and conduction electrodes serially coupled between said second node and a third node; the fourth transistor having a gate electrode coupled to said third node and conduction electrodes coupled between said third node and a reference potential terminal; a plurality of sixth transistors having gate electrodes coupled to said first node and conduction electrode serially coupled between said applied voltage terminal and the fourth node; a pluarlity of sixth transistors having gate electrodes coupled to said first node and conduction electrodes serially coupled between said fourth node and a fifth node; a plurality of seventh transistors having gate electrodes coupled to said first node and conduction electrodes serially coupled between said fifth node and a sixth node; an eighth transistor having a gate electrode coupled to said sixth node and conduction electrodes coupled between said sixth node and said reference potential terminal; a pluarlity of ninth transistors having gate electrodes coupled to said fourth node and conduction electrodes coupled between said applied voltage terminal and said fourth node; a tenth transistor having a gate electrode coupled to said fourth node and conduction electrodes coupled between said fourth node and a seventh node; and an eleventh transistor having a gate electrode coupled to said seventh node and conduction electrodes coupled between said seventh node and said reference potential terminal.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.