Integrated circuit package for surface mount technology

Abstract

The present invention provides for an apparatus and a method for housing an integrated circuit device. The integrated circuit device is coupled to a ceramic substrate wherein contacts of the integrated circuit device mate with contacts on the substrate surface. Conductive lines then couple the contacts to the peripheral edges of the substrate where one set of ends of a lead frame assembly mates with the conductors. An encapsulation technique is used to encapsulate the device, such that only the other set of ends of the lead frame assembly extends from the package. In an alternative embodiment, the integrated circuit is hermetically sealed by having a hermetic cover disposed over the integrated circuit. In a second alternative embodiment, the substrate is capable of having disposed upon it multiple integrated circuits. The present invention provides for a significant increase of lead count to die size ratio.

We claim: 
     
       1. An apparatus for housing an integrated circuit (IC), said IC being non-wettable by solder except for certain contact points disposed on the surface of said IC, said apparatus comprising: a substrate having electrical contacts for mounting said IC onto its surface such that said contact points of said IC are solder bonded to said electrical contacts of said substrate in a self-aligned manner;   said substrate having patterned conductive lines disposed throughout to electrically couple said electrical contacts to terminals disposed around the peripheral edges of said substrate, said conductive lines being sufficiently narrow so as to permit increased lead density;   a lead frame having a plurality of leads, each lead having a first end coupled to said terminals around said peripheral edges of said substrate;   encapsulating means for encapsulating said IC, substrate, terminals and first ends of said leads, such that only other ends of said leads extend externally off said encapsulating means.   
     
     
       2. The apparatus of claim 1, further including a hermetic seal which is disposed on said substrate to enclose said IC prior to being encapsulating by said encapsulating means. 
     
     
       3. The apparatus of claim 2, wherein said terminal contacts of said IC are coupled to said electrical contacts of said substrate by solder bonding. 
     
     
       4. The apparatus of claim 2, wherein said first end of each of said leads is comprised of fingers, wherein said substrate is disposed between said fingers. 
     
     
       5. The apparatus of claim 1, wherein said terminal contacts of said IC are coupled to said electrical contacts of said substrate by solder bonding. 
     
     
       6. The apparatus of claim 1, wherein said first end of each of said leads is comprised of fingers, wherein said substrate is disposed between said fingers. 
     
     
       7. An integrated circuit package for housing an integrated circuit (IC), the surface of said IC being non-wettable by solder except for certain contact points disposed on the surface of said IC, said package comprising: a substrate having electrical contacts for mounting said IC onto its surface such that said contact points of said IC are solder bonded to said electrical contacts of said substrate in a self-aligned manner.   said substrate having patterned conductive lines disposed throughout to electrically couple said electrical contacts to terminals disposed around the peripheral edges of said substrate, said lines being sufficiently narrow so as to permit increased lead density;   said substrate having a sealed ring upon its surface, said sealed ring forming an enclosed perimeter around said IC;   a lead frame having a plurality of leads each having a first end coupled to said terminals around said peripheral edges of said substrate;   a hermetic lid disposed above said seal ring to completely encase said IC.   
     
     
       8. The package of claim 7, further including the encapsulating means for encapsulating said IC, substrate, terminals and first ends of said leads, such that only other ends of said leads extend externally off said encapsulating means. 
     
     
       9. The package of claim 8, wherein said seal ring is formed from a metallic material and said lid is formed from a ceramic material. 
     
     
       10. The package of claim 7, wherein said seal ring is formed from a metallic material and said lid is formed from a ceramic material. 
     
     
       11. A package for housing a plurality of integrated circuits (ICs), each having a surface which is non-wettable by solder except for certain contact points, said package comprising: a substrate having electrical contacts for mounting said IC onto its surface such that said contact points of said ICs are solder bonded to said electrical contacts of said substrate in a self-aligned manner;   said substrate having patterned conductive lines disposed throughout to electrically couple said electrical contacts terminals disposed around the peripheral edges of said substrate, said connective lines being sufficiently narrow so as to permit increased lead density;   a lead frame having a plurality of leads, each lead having a first end coupled to said terminals around said peripheral edges of said substrate;   encapsulating means for encapsulating said IC, substrate, terminals and first ends of said leads, such that only other ends of said leads extend externally off said encapsulating means.   
     
     
       12. The apparatus of claim 11, further including a hermetic seal which is disposed on said substrate to enclose said ICs prior to being encapsulated by said encapsulating means. 
     
     
       13. A package for housing a plurality of integrated circuits (ICs) each of which has a surface which is non-wettable by solder except for certain contact points, said package comprising: a substrate having electrical contacts for mounting said ICs onto its surface such that said contact points of said IC are solder bonded to said electrical contacts of said substrate in a self-aligned manner;   said substrate having patterned conductive lines and disposed throughout to electrically couple said electrical contacts to terminals disposed around the peripheral edges of said substrate, said patterned conductive lines being sufficiently narrow so as to permit increased lead density;   a lead frame having a plurality of leads, each lead having a first end coupled to said terminals around said peripheral edges of said substrate;   a hermetic lid disposed above said seal ring to completely encase said ICs.   
     
     
       14. The package of claim 13, further including encapsulating means for encapsulating said ICs, substrate, terminals and first ends of said leads, such that only other ends of said leads extend externally off said encapsulating means. 
     
     
       15. The package of claim 14, wherein said seal ring is formed from a metallic material and said lid is formed from a ceramic material. 
     
     
       16. The package of claim 13, wherein said seal ring is formed from a metallic material and said lid is formed from a ceramic material. 
     
     
       17. A method for packaging an integrated circuit wherein lead density is increased for a given size die of said integrated circuit (IC), the surface of said IC being non-wettable by solder except for certain contact points, said method comprising the steps of: solder bonding said IC onto the surface of substrate such that said contact points of said IC couples to electrical contacts disposed on said substrate in a self-aligned manner;   said substrate having patterned conductive lines disposed throughout to couple said electrical contacts to terminals disposed around the peripheral edges of said substrate, said lines being sufficiently narrow so as to permit increased lead density;   coupling one end of a plurality of leads of a lead frame to said terminals around said peripheral edges of said substrate; and   enclosing said IC.   
     
     
       18. The method of claim 17, wherein the step of enclosing said IC comprises: hermetically sealing said IC by forming a hermetic cover on said substrate over said IC.   
     
     
       19. The method of claim 17, wherein the step of enclosing said IC comprises encapsulating said IC, substrate, terminals and first end of said first plurality of leads, such that other ends of said leads remain external to the encapsulating material. 
     
     
       20. The method of claim 17, wherein the step of enclosing said IC comprises hermetically sealing said IC by forming a hermetic cover on said substrate over said IC, substrate, terminals and first end of said plurality of leads, such that other ends of said leads remain external to the encapsulating material.