P
US4889820AExpiredUtilityPatentIndex 81

Method of producing a semiconductor device

Assignee: FUJITSU LTDPriority: Mar 14, 1988Filed: Mar 9, 1989Granted: Dec 26, 1989
Est. expiryMar 14, 2008(expired)· nominal 20-yr term from priority
Inventors:MORI HARUHISA
H10B 20/383H10P 30/22
81
PatentIndex Score
23
Cited by
9
References
12
Claims

Abstract

A method of producing a semiconductor device comprises the steps of: preparing a semiconductor substrate, forming a gate insulating layer on the semiconductor substrate, forming a gate electrode on the gate insulating layer, forming a source/drain region in the semiconductor substrate, forming an insulating cover layer on the entire exposed surface, forming a mask on the insulating cover layer having an opening over the gate electrode, implanting one conductivity type impurity ions into the semiconductor substrate through the insulating cover layer, the gate electrode and the gate insulating layer as a first ion implanting process, implanting opposite conductivity type impurity ions into the semiconductor substrate therethrough as a second implanting process, at an implanting angle larger than that used in the first ion implanting process with respect to the normal plane of the semiconductor substrate and to substantially the same depth as the first ion implanting process, and at a dosage smaller than that in the first ion implanting process, whereby the one conductivity type impurity ions at laterally spread portions are compensated.

Claims

exact text as granted — not AI-modified
I claim: 
     
       1. A method of producing a semiconductor device comprising the steps of: preparing a semiconductor substrate,   forming a gate insulating layer on the semiconductor substrate,   forming a gate electrode on the gate insulating layer,   forming a source/drain region in the semiconductor substrate,   forming an insulating cover layer on the entire exposed surface,   forming a mask on the insulating cover layer having an opening over the gate electrode,   implanting one conductivity type impurity ions into the semiconductor substrate through the insulating cover layer, the gate electrode and the gate insulating layer as a first ion implanting process,   implanting opposite conductivity type impurity ions into the semiconductor substrate therethrough as a second implanting process at an implanting angle larger than that of the first ion implanting process with respect to the normal plane of the semiconductor substrate and to substantially the same depth as in the first ion implanting process and at a dosage smaller than in the first ion implanting process, whereby said one conductivity type impurity ions at laterally spread portions are compensated.   
     
     
       2. A method according to claim 1, wherein said semiconductor substrate is a p type silicon substrate. 
     
     
       3. A method according to claim 1, wherein said gate electrode is a polycrystalline silicone electrode having a thickness of about 4000 Å. 
     
     
       4. A method according to claim 1, wherein said insulating cover layer positioned on the entire exposed surface is composed of two phospho-silicate glass layers having a total thickness of 1.1 μm. 
     
     
       5. A method according to claim 1, wherein said one conductivity type impurity ions are n type impurity ions. 
     
     
       6. A method according to claim 5, wherein said n type impurity ions are phosphorus ions (P + ). 
     
     
       7. A method according to claim 1, wherein said one conductivity type impurity ions are implanted at an implanting angle of 0° to 7° with respect to the normal plane of the semiconductor device. 
     
     
       8. A method according to claim 1, wherein said one conductivity type impurity ions are implanted at a projective range of 0.5 to 3 μm and a dosage of 1 to 5 ×10 13  /cm 2 . 
     
     
       9. A method according to claim 1, wherein said opposite conductivity type impurity ions are p type impurity ions. 
     
     
       10. A method according to claim 9, wherein said p type impurity ions are boron ions (B + ). 
     
     
       11. A method according to claim 1, wherein said opposite conductivity type impurity ions are implanted at an implanting angle of larger than 7° with respect to the normal plane of the semiconductor device. 
     
     
       12. A method according to claim 1, wherein said opposite conductivity type impurity ions are implanted at a projective range of 0.5 to 3 μm and a dosage of 1 to 5×10 12  /cm 2 .

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