Semiconductor device having trench type structure

Abstract

A semiconductor device comprises a P type semiconductor substrate (1) with a trench (12) formed on a main surface thereof. An N type drain region (15a) is formed at the bottom surface portion of the trench (12). An insulating layer (19c) is formed on the surface of the substrate (1) including a sidewall and the bottom surface of the trench (12), the layer having a hole (20b) whose bottom surface being at least the surface of the drain region (15a). A conductive layer (18) is formed on the insulating layer (19c) which is contact with the drain region (15a) at the bottom surface of the trench (12) through the hole (20b). The conductive layer (18) consititues a drain electrode. A gate (13) is interposed between the conductive layer (18) and the sidewall of the trench (12), formed along the sidewall of the trench (12) and insulated by the insulating layer (19c). An N type source region (15b) is formed on the surface of the substrate (1) including a portion of the sidewall of the trench (12). The drain electrode, the source electrode and the gate (13) constitute a MOS type field effect transistor (T2). At least a portion of a channel region is formed on the sidewall portion of the trench (12) between the drain region (15a) and the source region (15b). A capacitor (C2) is formed on the surface of the substrate (1) to be connected to the field effect transistor (T2).

What is claimed is: 
     
       1. A semiconductor device having a trench type structure, comprising: a semiconductor substrate of a first conductivity type having a main surface and a trench formed on the main surface;   a first impurity region of a second conductivity type formed on said semiconductor substrate at a bottom surface portion of said trench;   an insulating layer formed on the main surface of said semiconductor substrate and on a sidewall of said trench, said insulating layer having a hole extending to the bottom surface portion of said trench and to said first impurity region;   a conductive layer formed on said insulating layer and being in contact with said first impurity region at the bottom surface of said trench through said hole, said conducting layer constituting a first electrode;   a pair of gates each interposed between said conductive layer and a sidewall of said trench, formed along a respective sidewall of said trench and insulated therefrom by said insulating layer; and   a pair of second impurity regions of the second conductivity type formed on the main surface of said semiconductor substrate including a portion of the sidewall of said trench, connected to respective second electrodes; wherein   said first impurity region, said pair of second impurity regions and said pair of gates constitute a field effect device, and at least a portion of a channel region is formed on a sidewall of said trench between said first impurity region and one of said second impurity regions.   
     
     
       2. A semiconductor device having a trench type structure according to claim 1, further comprising an insulating layer formed on said conductive layer and having a hole therethrough extending to a surface of said conductive layer, and a wiring layer formed on the insulating layer, said wiring layer being in contact with said conductive layer through the hole. 
     
     
       3. A semiconductor device having a trench type structure according to claim 2, wherein said conductive layer has a bottom surface directly contacting said first impurity region and a top surface directly contacting said wiring layer, said top surface having a surface area larger than that of said bottom surface. 
     
     
       4. A semiconductor device having a trench type structure according to claim 1, further comprising a capacitor portion (C2) connected to said field effect device on the main surface of said semiconductor substrate. 
     
     
       5. A semiconductor device having a trench type structure according to claim 4, wherein said capacitor portion comprises a second conductive layer formed in contact with one of said second impurity regions, a capacitor insulating film formed on a surface of the second conductive layer and a third conductive layer formed on the capacitor insulating film, thereby constituting a capacitor for storing charges. 
     
     
       6. A semiconductor device having a trench type structure according to claim 5, wherein said second conductive layer is formed on an insulation layer on a bottom surface and on a sidewall of a second trench formed in the main surface of said semiconductor substrate. 
     
     
       7. A semiconductor device having a trench type structure according to claim 6, wherein said capacitor insulating film and said third conductive layer are formed on said second conductive layer along the sidewall and a bottom surface of said second trench. 
     
     
       8. A semiconductor device having a trench type structure according to claim 7, wherein the surface of said second trench is divided into a first lateral half and a second lateral half by said insulation layer formed on the bottom surface of said second trench,   a first portion of said second conductive layer formed on the sidewall and the bottom surface of one lateral half of said second trench being isolated from a second portion of said second conductive layer portion formed on the sidewall and bottom surface of the other lateral half of said second trench by said insulating film, and wherein   said third conductive layer and said first and second portions of said second conductive layer constitute separate capacitors for storing charges.   
     
     
       9. A semiconductor structure including a substrate having a trench formed at a surface thereof and extending into the substrate, a memory cell comprising a bit line, a capacitive charge storage means and a transistor, wherein said charge storage means includes a pair of capacitors each having a storage node, and   said transistor comprises:   a first impurity region formed in a first portion of said trench remote from said surface of said semiconductor substrate,   a pair of gates formed on an insulator layer on a sidewall of said trench,   a pair of second impurity regions formed in portions of said sidewall of said trench and spaced apart from said first impurity region, said portions of said sidewall of said trench being closer to said surface of said semiconductor substrate than said first impurity region,   said first impurity region being connected to said bit line, and   said second impurity regions being connected to respectively said storage nodes.   
     
     
       10. A semiconductor device having a trench type structure, comprising: a semiconductor substrate of a first conductivity type having a main surface and a trench formed on the main surface;   a first source/drain region of a second conductivity type of a field effect transistor formed on said semiconductor substrate at a bottom surface portion of said trench;   an insulating layer formed on a sidewall of said trench extending to an exposed portion of said first impurity region;   a conductive layer for transferring a signal appearing at said first source/drain region and formed on said insulating layer to be directly in contact with said first source/drain region at the bottom surface of said trench;   a pair of gates of said field effect transistor each interposed between said conductive layer and said insulating layer on a sidewall of said trench, formed along the sidewall of said trench and isolated from said conductive layer; and   a pair of second source/drain regions of the second conductivity type of said field effect transistor formed on the main surface of said semiconductor substrate including a portion of the sidewall of said trench; and wherein   a channel region of said field effect transistor is formed on said semiconductor substrate positioned at the sidewall of said trench between said first and each of said second source/drain regions.   
     
     
       11. A semiconductor device having a trench type structure according to claim 10, further comprising an insulating layer formed on said conductive layer and having a hole therethrough extending to a surface of said conductive layer, and a wiring layer formed on the insulating layer, said writing layer being in contact with said conductive layer through the hole. 
     
     
       12. A semiconductor device having a trench type structure according to claim 11, wherein said conductive layer has a bottom surface directly contacting said first impurity region and a top surface directly contacting said wiring layer, said top surface having a surface area larger than that of said bottom surface. 
     
     
       13. A semiconductor device having a trench type structure according to claim 10, further comprising a capacitor portion connected to said field effect transistor on the main surface of said semiconductor substrate. 
     
     
       14. A semiconductor device having a trench type structure according to claim 13, wherein said capacitor portion comprises a second conductive layer formed in contact with one of said second source/drain regions, a capacitor insulating film formed on a surface of the second conductive layer and a third conductive layer formed on the capacitor insulating film, thereby constituting a capacitor for storing charges. 
     
     
       15. A semiconductor device having a trench type structure according to claim 14, wherein said second conductive layer is formed on an insulation layer on a bottom surface and on a sidewall of a second trench formed in the main surface of said semiconductor substrate. 
     
     
       16. A semiconductor device having a trench type structure according to claim 15, wherein said capacitor insulating film and said third conductive layer are formed on said second conductive layer along the sidewall and a bottom surface of said second trench. 
     
     
       17. A semiconductor device having a trench type structure according to claim 16, wherein the surface of said second trench is divided into a first lateral half and a second lateral half by said insulation layer formed on the bottom surface of said second trench;   a first portion of said second conductive layer formed on the sidewall and the bottom surface of one lateral half of said second trench being isolated from a second portion of said second conductive layer portion formed on the sidewall and bottom surface of the other lateral half of said second trench, and wherein   said third conductive layer and said first and second portions of said second conductive layer constitute separate capacitors for storing charges.   
     
     
       18. A semiconductor device having a trench type structure, comprising: a semiconductor substrate of a first conductivity type having a main surface and a trench formed on the main surface;   a first impurity region of a second conductivity type formed on said semiconductor substrate at a bottom surface portion of said trench;   an insulating layer formed on the main surface of said semiconductor substrate and on a sidewall of said trench, said insulating layer having a hole extending to the bottom surface portion of said trench and to said first impurity region;   a conductive layer formed on said insulating layer and being in contact with said first impurity region at the bottom surface of said trench through said hole, said conducting layer constituting a first electrode;   a gate interposed at least between said conductive layer and the sidewall of said trench, formed along the sidewall of said trench and insulated therefrom by said insulating layer;   a second impurity region of the second conductivity type formed on the main surface of said semiconductor substrate including a portion of the sidewall of said trench, connected to a second electrode;   said first impurity region, said second impurity region and said gate forming a field effect device, with at least a portion of a channel region formed on the sidewall of said trench between said first impurity region and said second impurity region;   a capacitor portion connected to said field effect device on the main surface of said semiconductor substrate, said capacitor portion comprising a second conductive layer formed in contact with said second impurity region, a capacitor insulating film formed on a surface of the second conductive layer and a third conductive layer formed on the capacitor insulating film; and   wherein said second conductive layer is formed on an insulation layer on a bottom surface and on a sidewall of a second trench formed in the main surface of said semiconductor substrate and said second impurity region includes a region formed along the side wall of the second trench.