US5043292AExpiredUtility

Self-aligned masking for ultra-high energy implants with application to localized buried implants and insolation structures

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Assignee: NAT SEMICONDUCTOR CORPPriority: May 31, 1990Filed: May 31, 1990Granted: Aug 27, 1991
Est. expiryMay 31, 2010(expired)· nominal 20-yr term from priority
Y10S438/966Y10S438/945Y10S438/95H10P 30/22H10P 14/6502H10W 15/01H10W 15/00H10P 14/6309
42
PatentIndex Score
8
Cited by
8
References
5
Claims

Abstract

A self-aligned masking process for use with ultra-high energy implants (implant energies equal to or greater than 1 MeV) is provided. The process can be applied to an arbitrary range of implant energies. Consequently, high doses of dopant may be implanted to give high concentrations that are deeply buried. This can be coupled with the fact that amorphization of the substrate lattice is relatively localized to the region where the ultra-high energy implant has peaked to yield a procedure to form buried, localized isolation structures.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of forming a masking structure for blocking implantation of dopant atoms into a silicon substrate at implant energies equal to or greater than 1 MeV, the method comprising: (a) forming a silicon dioxide layer on the silicon substrate;   (b) forming a first layer of polysilicon on the silicon dioxide layer;   (c) forming a metal silicide layer on the first layer of polysilicon;   (d) forming one or more additional layers of polysilicon overlying the metal silicide layer, each of the one or more additional layers of polysilicon being separated from an overlying adjacent layer of polysilicon by a layer of metal silicide formed therebetween,   the total thickness of all polysilicon layers being greater than about the following thickness for each 1 MeV increment in implant energy ##EQU2## where W s  is the atomic weight of silicon and W D  is the atomic weight of the dopant atoms; and   (e) forming a trench through each of the layers recited in steps (a)-(d) to expose a surface region of the silicon substrate.   
     
     
       2. A method of forming a masking structure for blocking implantation of silicon atoms into a silicon substrate at implant energies equal to or greater than 1MeV, the method comprising: (a) forming a silicon dioxide layer approximately 0.5 microns thick on the silicon substrate;   (b) forming a first polysilicon layer approximately 2.0-2.5 microns thick on the silicon dioxide layer;   (c) forming at least one additional polysilicon layer 2.0-2.5 microns thick overlying the first polysilicon layer for each incremental increase in implant energy beyond 2MeV, each additional polysilicon layer being separated from the overlying polysilicon layer by a layer of metal silicide;   (d) forming a trench through each of the layers recited in elements (a)-(c) to expose a surface region of the silicon substrate; and   (e) implanting silicon atoms into the surface region at an implant energy equal to or greater than 2 MeV.   
     
     
       3. A method of forming a localized buried isolation structure in a silicon substrate, the method comprising: (a) forming a layer of dielectric material on the silicon substrate;   (b) ion implanting dopant atoms into the silicon substrate at an implant energy equal to or greater than 2 MeV to define a buried amorphized region with its peak implant concentration below the surface of the silicon substrate;   (c) forming a plurality of trenches in the silicon substrate to a depth below that of the depth of the amorphized buried region; and   (d) oxidizing the buried region to convert the amorphized buried region to a buried oxide isolation structure.   
     
     
       4. A method of forming a localized buried isolation structure in a silicon substrate by implanting dopant atoms, the method comprising: (a) forming a layer of dielectric material on the silicon substrate;   (b) forming polysilicon overlying the layer of dielectric material, the thickness of the polysilicon being greater than about the following thickness for each 1 MeV incremental increase in implant energy ##EQU3## where W s  is the atomic weight of silicon and W D  is the atomic weight of the dopant atoms; and   (c) forming a plurality of trenches through each of the layers recited in steps (a) and (b) to expose a plurality of surface regions of the silicon substrate;   (d) forming a layer of dielectric material on the exposed surface regions of the silicon substrate;   (e) implanting dopant atoms into the exposed surface regions of the silicon substrate at an implant energy equal to or greater than 2 MeV to define a plurality of buried amorphized regions below the surface of the silicon substrate;   (f) forming trenches in the silicon substrate to a depth below the depth of the amorphized buried regions such that at least two trenches intersect each of the amorphized buried regions; and   (g) oxidizing the amorphized buried regions to convert the amorphized buried regions to localized buried oxide isolation structures   
     
     
       5. A method of forming a masking structure for blocking implantation of dopant atoms into a silicon substrate at implant energies equal to or greater than 1 MeV, the method comprising: (a) forming a layer of dielectric material on the silicon substrate;   (b) forming a composite conductive layer overlying the layer of dielectric material by forming a first layer of polysilicon on the layer of dielectric material and forming at least one additional layer of polysilicon overlying the first polysilicon layer, the at least one additional layer of polysilicon being separated from the first polysilicon layer by a layer of conductive material formed therebetween, the thickness of the composite conductive layer being greater than about the following thickness for each 1 MeV incremental increase in implant energy ##EQU4##  where W s  is the atomic weight of silicon and W D  is the atomic weight of the dopant atoms; and   (c) forming a trench through each of the layers recited in steps (a) and (b) to expose a surface region of the silicon substrate.

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