Method of making a semiconductor device with a metallic layer coupled to a lower region of a substrate and metallic layer coupled to a lower region of a semiconductor device

Abstract

An electrical apparatus having a first substrate, a first metallic layer, a semiconductor device, a second metallic layer, and a metallic interconnecting structure is described. The first substrate is of a semiconductor material and has an upper region and a lower region. The substrate provides an electrical path between the upper region and the lower region. The first metallic layer is coupled to the lower region of the substrate. The first metallic layer provides a first external electrical connection. The semiconductor device has an upper region and a lower region. The second metallic layer is coupled to the lower region of the semiconductor device. The second metallic layer provides a second external electrical connection. The metallic interconnecting structure electrically couples the upper region of the first substrate to the upper region of the semiconductor device. A bridge apparatus is also described. In addition, a method of fabricating an electrical apparatus is described.

What is claimed is: 
     
       1. A method of fabricating a semiconductor device, comprising the steps of: forming a mesa comprised of a layer of a first conductivity of semiconductor material and a layer of second conductivity of semiconductor material, wherein the mesa resides on a substrate of a wafer of a third conductivity of semiconductor material;   forming a first trench in an upper region of the substrate;   forming a second trench in the upper region of the substrate between the mesa and the first trench, wherein the second trench is deeper than the first trench;   covering the mesa, a top of the substrate, and the first and second trenches with a layer of glass;   forming an opening through the layer of glass to the top of the mesa;   forming an opening through the layer of glass to the bottom of the first trench;   forming a metallic interconnecting structure that electrically couples the bottom of the first trench to the top of the mesa over a portion of the layer of glass between the mesa and the first trench;   forming a module that includes the metallic interconnecting structure, said portion of the layer of glass, the mesa, the first trench, the second trench, and a portion of the substrate of the wafer;   removing the semiconductor material residing below a bottom of the second trench in order to form a first discrete region of semiconductor material that includes the first trench and a second discrete region of semiconductor material that includes the mesa;   applying metal or metal alloy to a bottom of the first discrete region and a bottom of the second discrete region.   
     
     
       2. The method of claim 1 of fabricating a semiconductor device, wherein the first conductivity of semiconductor material is P+ type semiconductor material, the second conductivity of semiconductor material is N- type semiconductor material, and the third conductivity of semiconductor material is N+ type semiconductor material. 
     
     
       3. The method of claim 1 of fabricating a semiconductor device, wherein the first conductivity of semiconductor material is N+ type semiconductor material, the second conductivity of semiconductor material is P- type semiconductor material, and the third conductivity of semiconductor material is P+ type semiconductor material. 
     
     
       4. The method of claim 1 of fabricating a semiconductor device, wherein the metal alloy applied to the bottom of the first discrete region and the bottom of the second discrete region is nickel-arsenic-gold. 
     
     
       5. The method of claim 1 of fabricating a semiconductor device, wherein the metallic interconnecting structure is comprised of titanium. 
     
     
       6. The method of claim 1 of fabricating a semiconductor device, further comprising the step of coating the metallic interconnecting structure with a layer of gold.