Method of planarizing a semiconductor workpiece surface

Abstract

The present invention relates to a simple, low cost planarization technique whereby physical pressure is used to planarize the surface of a semiconductor device. The method of the present invention planarizes a semiconductor workpiece surface and results in an increase in the productivity of the processing steps that follow. In effect, the present invention applies physical pressure to flatten the surface layers of a semiconductor workpiece. The present invention is particularly adapted for use in planarizing surface layers made of plastic materials.

What is claimed is: 
     
       1. A semiconductor workpiece processing method, comprising: providing a semiconductor workpiece;   forming a layer of material on said semiconductor workpiece; and   contacting a surface of said layer of material with a plate having apertures formed therein to apply pressure so as to planarize said surface of said layer of material,   wherein excess material flows through said apertures when said plate contacts said surface of said layer of material.   
     
     
       2. The semiconductor workpiece processing method of clam 1, further comprising the step of heating said layer of material while said plate contacts said surface of said layer of material. 
     
     
       3. The semiconductor workpiece processing method of claim 1, further comprising the steps of pre-heating said plate before said plate contacts said surface of said layer of material, and   further heating said plate while said plate contacts said surface of said layer of material.   
     
     
       4. The semiconductor workpiece processing method of claim 1, wherein a surface of said plate which contacts said surface of said layer of material is coated with a layer of non-stick material. 
     
     
       5. The semiconductor workpiece processing method of claim 4, wherein said non-stick material is a silicone material. 
     
     
       6. The semiconductor workpiece processing method of claim 4, wherein said non-stick material is a fluorocarbon material. 
     
     
       7. The semiconductor workpiece processing method of claim 1, wherein said layer of material is comprised of a dielectric material. 
     
     
       8. The semiconductor workpiece processing method of claim 1, wherein said layer of material is comprised of a material containing silicon dioxide. 
     
     
       9. The semiconductor workpiece processing method of claim 1 wherein said layer of material comprises spin-on-glass (SOG). 
     
     
       10. The semiconductor workpiece processing method of claim 1, wherein said layer of material is comprised of a doped silicon dioxide material. 
     
     
       11. The semiconductor workpiece processing method of claim 10, wherein said doped silicon dioxide material comprises phosphorous silicate glass (PSG). 
     
     
       12. The semiconductor workpiece processing method of claim 10, wherein said doped silicon dioxide material comprises borophosphorous silicate glass (BPSG). 
     
     
       13. The semiconductor workpiece processing method of claim 1, wherein said layer of material is comprised of a field oxide. 
     
     
       14. The semiconductor workpiece processing method of claim 1, wherein said layer of material is comprised of a metallic material. 
     
     
       15. The semiconductor workpiece processing method of claim 1, wherein said layer of material is comprised of a semiconductor material. 
     
     
       16. The semiconductor workpiece processing method of claim 1, wherein said plate is a metallic plate. 
     
     
       17. A method of planarizing a semiconductor workpiece surface comprising: providing a plate having apertures formed therein;   pre-heating said plate to an elevated temperature;   contacting said semiconductor workpiece surface with said heated plate; and   further heating said plate to a further elevated temperature while said plate contacts said semiconductor workpiece surface so as to planarize said semiconductor workpiece surface,   wherein excess surface material of said semiconductor workpiece surface flows through said apertures when said plate contacts said semiconductor workpiece surface.   
     
     
       18. The method of planarizing a semiconductor workpiece surface of claim 17, wherein a surface of said plate which contacts said semiconductor workpiece surface is coated with a layer of non-stick material. 
     
     
       19. The method of planarizing a semiconductor workpiece surface of claim 18, wherein said non-stick material comprises a silicone material. 
     
     
       20. The method of planarizing a semiconductor workpiece surface of claim 18, wherein said non-stick material comprises a fluorocarbon material. 
     
     
       21. The method of planarizing a semiconductor workpiece surface of claim 17, wherein said semiconductor workpiece surface is comprised of a dielectric material. 
     
     
       22. The method of planarizing a semiconductor workpiece surface of claim 17, wherein said semiconductor workpiece surface is comprised of a material containing silicon dioxide. 
     
     
       23. The method of planarizing a semiconductor workpiece surface of claim 17, wherein said semiconductor workpiece surface comprises spin-on-glass (SOG). 
     
     
       24. The method of planarizing a semiconductor workpiece surface of claim 17, wherein said semiconductor workpiece surface is comprised of a doped silicon dioxide material. 
     
     
       25. The method of planarizing a semiconductor workpiece surface of claim 24, wherein said doped silicon dioxide material comprises phosphorous silicate glass (PSG). 
     
     
       26. The method of planarizing a semiconductor workpiece surface of claim 24, wherein said doped silicon dioxide material comprises borophosphorous silicate glass (BPSG). 
     
     
       27. The method of planarizing a semiconductor workpiece surface of claim 17, wherein said semiconductor workpiece surface is comprised of a field oxide. 
     
     
       28. The method of planarizing a semiconductor workpiece surface of claim 17, wherein said semiconductor workpiece surface is comprised of a metallic material. 
     
     
       29. The method of planarizing a semiconductor workpiece surface of claim 17, wherein said semiconductor workpiece surface is comprised of a semiconductor material. 
     
     
       30. The method of planarizing a semiconductor workpiece surface of claim 17, wherein said heated plate is moved into contact with said semiconductor workpiece surface. 
     
     
       31. The method of planarizing a semiconductor workpiece surface of claim 17, wherein said plate is a metallic plate.