Method of fabricating flip-chip on leads devices and resulting assemblies

Abstract

A semiconductor die assembly and methods of forming same comprising a lead frame having a plurality of lead fingers and a semiconductor die having a plurality of electric contact points on an active surface of said semiconductor die. The electric contact points are located or rerouted on the semiconductor die active surface so as to maximize the size and spacing of electric contact points relative to the lead fingers, which may be custom-configured to match the "open" array of contact points and widened to enhance surface area for connection thereto. This arrangement results in large and robust flip-chip type interconnections between the electric contact points and the lead frame, eliminating the need for wirebonding and for adhesive connections of the lead frame to the die active surface.

What is claimed is: 
     
       1. A method of producing a semiconductor die assembly, comprising the steps of: configuring a semiconductor die having an active surface with a plurality of electric contact points of sufficient size and sufficiently spaced to accommodate connection to lead fingers of an adjacent lead frame through vertically interposed discrete conductive material elements providing substantially complete mechanical support for said die through said discrete conductive material elements and electrical communication between said plurality of electric contact points and said lead fingers;   configuring lead fingers of a lead frame to extend in vertical proximity to said plurality of contact points; and   securing said plurality of electric contact points to said lead fingers with said discrete conductive material elements.   
     
     
       2. The method of claim 1, further comprising configuring said plurality of electric contact points by providing conductive traces extending from bond pad locations elsewhere on said die active surface. 
     
     
       3. The method of claim 1, further comprising altering a vertical distance between said active surface and upper surfaces of said lead fingers while maintaining structural strength of said lead fingers and providing an enhanced interface area with said discrete conductive material elements by providing lead fingers of reduced thickness and expanded width. 
     
     
       4. The method of claim 1, wherein said step of securing includes application of heat to said discrete conductive material elements. 
     
     
       5. The method of claim 1, further comprising extending conductive traces to said plurality of electrical contact points from locations elsewhere on said active surface, and interposing a layer of dielectric material between said semiconductor die active surface and said conductive traces. 
     
     
       6. The method of claim 1, further comprising interposing a dielectric layer between said lead fingers and said active surface after securing said lead fingers to said plurality of electric contact points. 
     
     
       7. A method of utilizing a semiconductor memory die in which at least some memory capacity is defective, comprising: selecting power and signal bond pads on an active surface of said die to provide access to non-defective memory residing on said die;   configuring lead fingers of a lead frame to extend proximate said active surface and across said power and signal bond pads; and   placing said lead frame adjacent said die with said lead fingers adjacent said active surface and mechanically securing and electrically attaching said lead fingers and said power and signal bond pads using discrete conductive elements extending vertically therebetween, wherein said lead fingers provide substantially complete mechanical support for said die.   
     
     
       8. The method of claim 7, further comprising encapsulating said active surface and said lead fingers. 
     
     
       9. The method of claim 7, further comprising rerouting at least one of said power and signal bond pads to a different location on said active surface, and configuring at least one lead finger to be associated with said at least one bond pad to lie adjacent thereto in said different location. 
     
     
       10. The method of claim 9, wherein said rerouting comprises extending a conductive trace over said active surface from said at least one bond pad to said different location. 
     
     
       11. The method of claim 7, further comprising rerouting at least some of said power and signal bond pads to different locations at greater relative distances from one another on said active surface than in their original positions. 
     
     
       12. The method of claim 11, further comprising enlarging said at least some rerouted power and signal bond pads in comparison to their original dimensions. 
     
     
       13. A method of adapting a semiconductor die for vertical interconnection to lead fingers of a lead frame, comprising: providing a semiconductor die having bond pads on an active surface thereof, said bond pads being too closely spaced to effect said vertical interconnection to lead fingers through discrete conductive elements selected from the group consisting of reflowable metals and curable conducting polymers; and   rerouting said bond pads to contact points at more widely-spaced locations.   
     
     
       14. The method of claim 13, further comprising enlarging said contact points relative to said bond pads. 
     
     
       15. A method of employing a semiconductor die with a lead frame including lead fingers, comprising: providing a discrete die location having an active surface on which resides a plurality of bond pads having a pitch too fine to bond to lead fingers using alignment equipment having a tolerance of plus or minus two mils; and   rerouting at least some of said plurality of bond pads with conductive traces extending on said active surface to provide a bond pad pitch suitable for use with said alignment equipment.   
     
     
       16. The method of claim 15, further including configuring lead fingers of said lead frame to mate with said plurality of bond pads after said rerouting. 
     
     
       17. The method of claim 16, further including mechanically and electrically connecting said mating lead fingers and said plurality of bond pads through vertically interposed discrete conductive elements. 
     
     
       18. A method of adapting a semiconductor die to effect a flip-chip type connection, comprising: providing a discrete die location having an active surface on which resides a plurality of bond pads in a first pattern, wherein said bond pads of said first pattern include a pitch too fine to bond to lead fingers using alignment equipment having a tolerance of plus or minus two mils;   determining new locations on said active surface for some but not all of said plurality of bond pads; and   forming conductive traces from said some bond pads to said new locations over a passivation layer over said active surface to provide a bond pad pitch suitable for use with said alignment equipment, and simultaneously forming conductive trace pads on bond pads not being relocated.   
     
     
       19. The method of claim 18, wherein said conductive traces and said trace pads are formed to substantially the same thickness. 
     
     
       20. The method of claim 19, further comprising forming a dielectric layer over said active surface except over said new locations and said trace pads. 
     
     
       21. The method of claim 19, further comprising disposing discrete conductive material elements on said traces at said new locations and on said trace pads. 
     
     
       22. The method of claim 21, further comprising forming under bump metallization on said new locations and said trace pads before disposing said discrete conductive material elements. 
     
     
       23. The method of claim 21, further comprising securing lead fingers of a lead frame to said discrete conductive material elements. 
     
     
       24. The method of claim 23, further comprising disposing a dielectric layer between said lead fingers and said die. 
     
     
       25. The method of claim 24, further comprising extending said dielectric layer to a height above said lead fingers. 
     
     
       26. The method of claim 24, wherein said disposing a dielectric layer comprises transfer molding a filled polymer package around said discrete die location.