Method of fabricating static random access memory

Abstract

A method of fabricating a static random access memory. A gate oxide layer is formed on a substrate having active regions of an access transistor and a drive transistor. A Polysilicon layer is formed on the gate oxide layer. A germanium implantation is performed on the polysilicon layer of the active region of the drive region to form a polysilicon germanium layer. Thereafter, the polysilicon layer and the polysilicon germanium layer are patterned to form a poly gate and a polysilicon germanium gate on the active regions of the access transistor and the drive transistor. A lightly doped region is formed in the substrate beside the gates. A spacer is then formed on the sidewall of the gates. A heavily doped region is formed in the substrate beside the spacer.

What is claimed is: 
     
       1. A method of fabricating a static random access memory adapted for a substrate having active regions of a drive transistor and an access transistor, comprising: forming a gate oxide layer on the substrate;   forming a polysilicon layer on the gate oxide layer;   forming a polysilicon germanium layer on the active region of the drive transistor by germanium implantation;   forming a polysilicon germanium gate and a poly gate on the active regions of the drive transistor and the access transistor, respectively;   forming a lightly doped region in the substrate beside the polysilicon germanium gate and the poly gate;   forming a spacer on the sidewall of the polysilicon germanium gate and the poly gate; and   forming a heavily doped region in the substrate beside the spacer.   
     
     
       2. The method according to claim 1, wherein the spacer is made of insulating materials. 
     
     
       3. The method according to claim 1, further comprising the step of performing an ion implantation when the germanium implantation is performed. 
     
     
       4. The method according to claim 3, wherein the ion implantation comprises N-type ions. 
     
     
       5. The method according to claim 1, wherein the lightly doped region and the heavily doped region comprise N-type impurities. 
     
     
       6. A method of fabricating a static random access memory adapted for a substrate having active regions of a drive transistor and an access transistor, comprising: forming a gate oxide layer on the substrate;   forming a polysilicon layer on the gate oxide layer;   forming a mask on the substrate to at least cover the active region of the access transistor, so that the active region of the drive transistor is exposed;   performing a germanium implantation on the substrate to transfer a portion of the polysilicon layer into a polysilicon germanium layer;   patterning the polysilicon germanium layer and the polysilicon layer to respectively form a polysilicon germanium gate and a poly gate on the active regions of the drive transistor and the access transistor;   performing a light ion implantation on the substrate;   forming a spacer on the sidewall of the polysilicon germanium gate and the poly gate; and   performing a heavy ion implantation on the substrate.   
     
     
       7. The method according to claim 6, wherein the spacer is made of insulating materials. 
     
     
       8. The method according to claim 6, further comprises the step of performing an ion implantation when the germanium implantation is performed. 
     
     
       9. The method according to claim 8, wherein the ion implantation comprises N-type ions. 
     
     
       10. The method according to claim 6, wherein the steps of performing a lighy ion implantation and a heavy ion implantation comprise N-type ions.