Method for forming self-aligned contact

Abstract

A method for forming a self-aligned contact includes forming a second insulating layer, on a first insulating layer including a first self-aligned contact pad formed on a semiconductor substrate, forming a conductive architecture on the second insulating layer, and forming a second self-aligned contact pad on both sides of the conductive architecture. The conductive architecture is covered with a material layer having an etch selectivity with respect to the second insulating layer and the second self-aligned contact pad is electrically connected to the first self-aligned contact pad. Thus, a self-aligned contact pad is formed with two layers. Accordingly, the contact is self-aligned to a gate electrode and a bit line, thereby preventing shorts generated by misalignment. Further, the etching thickness is reduced while etching an oxide layer to form a storage node contact hole, thereby suppressing shorts and reducing the critical dimension of a storage node contact. As a result, it is possible to insure misalignment margin to a storage node.

What is claimed is:  
     
       1. A method for forming a self-aligned contact comprising: 
       forming a first insulating layer on a semiconductor substrate where a transistor is formed;  
       forming a first self-aligned contact pad in said first insulating layer to be electrically connected to said semiconductor substrate outside of said transistor;  
       forming a second insulating layer on said first insulating layer, including said first self-aligned contact pad;  
       forming a conductive architecture on said second insulating layer, said conductive architecture being covered with a material layer having an etch selectivity with respect to said second insulating layer;  
       forming a third insulating layer on said second insulating layer, including said conductive architecture;  
       using a photoresist pattern and sequentially etching said third insulating layer and said second insulating layer down to a top surface of said first self-aligned contact pad, to form a first opening;  
       forming a second self-aligned contact pad electrically connected to said first self-aligned contact pad via said first opening;  
       forming a fourth insulating layer on said third insulating layer including said second self-aligned contact pad;  
       etching said fourth insulating layer down to a top surface of said second self-aligned contact pad, to form a second opening; and  
       forming a storage node electrically connected to said second self-aligned contact pad via said second opening.  
     
     
       2. The method of claim  1 , wherein said first, said second, said third, and said fourth insulating layers are made of oxide, and said material layer is made of silicon nitride. 
     
     
       3. The method of claim  1 , wherein said fourth insulating layer is formed with a thickness of about 1,000 to 2,000 Å. 
     
     
       4. The method of claim  1 , wherein said conductive architecture is a bit line. 
     
     
       5. The method of claim  1 , wherein said photoresist pattern has a linear opening that exposes at least two underlying contact areas. 
     
     
       6. A method for forming self-aligned contact comprising: 
       forming a first insulating layer on a semiconductor substrate where a transistor is formed;  
       forming a first self-aligned contact pad in said first insulating layer to be electrically connected to said semiconductor substrate outside of said transistor;  
       forming a second insulating layer on said first insulating layer including said first self-aligned contact pad;  
       forming spaced apart conductive architectures on said second insulating layer, said conductive architectures being covered with a material layer having an etch selectivity with respect to said second insulating layer;  
       etching said second insulating layer between said conductive architectures down to a top surface of said first self-aligned contact pad by using a photoresist pattern as a mask, defining an area for a second self-aligned contact pad;  
       forming a pad formation conductive layer on said conductive architectures and on a space therebetween;  
       planarizing said pad formation conductive layer down to a top surface of said material layer of said conductive architectures;  
       patterning said pad formation conductive layer to form a second self-aligned contact pad electrically connected to said first self-aligned contact pad;  
       forming a third insulating layer on said second insulating layer, including said second self-aligned contact pad;  
       etching said third insulating layer down to a top surface of said second self-aligned contact pad to form an opening; and  
       forming a storage node electrically connected to said second self-aligned contact pad via said opening.  
     
     
       7. The method of claim  6 , wherein said photoresist pattern has a linear opening that exposes at least two contact areas.