Integrated circuit having integral decoupling capacitor

Abstract

The present invention is a decoupling capacitor for an integrated circuit. The integrated circuit has a final metal layer which includes a power bus. The decoupling capacitor comprises a dielectric film disposed over the final metal layer and a conductive film disposed over the dielectric layer, whereby capacitance may be provided in the dielectric layer.

What is claimed is:  
     
       1. A method of forming an integral decoupling capacitor for an integrated circuit device, comprising the steps of: 
       providing an integrated circuit device base having a substrate;  
       forming a final metal layer directly over the substrate, the final metal layer including a plurality of power busses acting as at least one first capacitor plate and a plurality of signal wires, wherein the plurality of signal wires are electrically isolated from the plurality of power busses;  
       placing a dielectric film over the final metal layer; and  
       placing a conductive film over the dielectric film, acting as at least one second capacitor plate, wherein the integral decoupling capacitor is formed over the plurality of power busses.  
     
     
       2. The method of forming an integral decoupling capacitor of claim  1 , further comprising the step of placing an overcoat layer over the conductive film. 
     
     
       3. The method of forming an integral decoupling capacitor of claim  2 , further comprising the step of forming vias to enable connections to the conductive film and the final metal layer. 
     
     
       4. The method of forming an integral decoupling capacitor of claim  1 , wherein the dielectric film covers substantially all of the final metal layer of the integrated circuit. 
     
     
       5. The method of forming an integral decoupling capacitor of claim  1 , wherein the step of placing the dielectric film comprises depositing the dielectric film by chemical vapor deposition. 
     
     
       6. The method of forming an integral decoupling capacitor of claim  1 , wherein the dielectric film is formed to comprise silicon nitride. 
     
     
       7. The method of forming an integral decoupling capacitor of claim  1 , wherein the conductive film is formed to cover the top and sides of the plurality of power busses. 
     
     
       8. The method of forming an integral decoupling capacitor of claim  1 , wherein the conductive film is formed to comprise at least two conductive strips. 
     
     
       9. The method of forming an integral decoupling capacitor of claim  1 , wherein 
       the final metal layer is formed to include signal wires; and  
       the conductive film is formed so that it does not cover the plurality of signal wires.  
     
     
       10. The method of forming an integral decoupling capacitor of claim  1 , wherein the step of placing the conductive film comprises sputtering the conductive film. 
     
     
       11. The method of forming an integral decoupling capacitor of claim  1 , wherein the conductive film is formed to comprise aluminum.