US6380072B2ExpiredUtilityA1

Metallizing process of semiconductor industry

35
Assignee: MOSEL VITELIC INCPriority: Aug 4, 1998Filed: Nov 29, 2000Granted: Apr 30, 2002
Est. expiryAug 4, 2018(expired)· nominal 20-yr term from priority
H10P 95/00
35
PatentIndex Score
0
Cited by
8
References
18
Claims

Abstract

A method for manufacturing a semiconductor device having an excellent metallization is provided. The method includes the steps of a). providing a semiconductor substrate, b) forming a conductive layer on the semiconductor substrate, c) forming a dielectric layer on the conductive layer, d) forming a titanium nitride layer directly on the dielectric layer without contacting the conductive layer, and e) patternizing the titanium nitride layer, the dielectric layer and the conductive layer, wherein the dielectric layer is used for avoiding spontaneous electrochemical reaction between the titanium nitride layer and the conductive layer,

Claims

exact text as granted — not AI-modified
What we claim is:  
     
       1. A metallizing process for metallizing a semiconductor device comprising the steps of: 
       a) providing a semiconductor substrate;  
       b) forming a conductive layer on said semiconductor substrate;  
       c) forming a dielectric layer on said conductive layer;  
       d) forming a titanium nitride layer directly on said dielectric layer and without contacting said conductive layer; and  
       e) patternizing said titanium nitride layer, said dielectric layer and said conductive layer,  
       wherein said (dielectric layer is used for avoiding spontaneous electrochemical reaction between said titanium nitride layer and said conductive layer. 
     
     
       2. The metallizing process according to  claim 1  wherein said step b) is executed by a reactive DC sputtering. 
     
     
       3. The metallizing process according to  claim 1  wherein said conductive layer is a metal layer. 
     
     
       4. The metallizing process according to  claim 3 , wherein said metal layer is made of an AlCu alloy. 
     
     
       5. The metallizing process according to  claim 1  wherein said conductive layer has a thickness ranged from 5,000 Ř10,000 Å. 
     
     
       6. The metallizing process according to  claim 1  wherein said step c) is executed by oxidation. 
     
     
       7. The metallizing process according to  claim 6  wherein said dielectric layer is an oxide layer. 
     
     
       8. The metallizing process according to  claim 7  wherein said oxide layer is an aluminum oxide (Al 2 O 3 ) layer. 
     
     
       9. The metallizing process according to  claim 8  wherein said aluminum oxide layer has a thickness ranged from 10 Å to 20 Å. 
     
     
       10. The metallizing process according to  claim 7  wherein said oxide layer is a silicon dioxide (SiO 2 ) layer. 
     
     
       11. The metallizing process according to  claim 10  wherein said silicon dioxide layer has a thickness ranged from 10 Å to 50 Å. 
     
     
       12. The metallizing process according to  claim 1  wherein said step c) is executed by nitridation. 
     
     
       13. The metallizing process according to  claim 1  wherein said dielectric layer is a nitride layer. 
     
     
       14. The metallizing process according to  claim 13  wherein said nitride layer is an aluminum nitride (AlN) layer. 
     
     
       15. The metallizing process according to  claim 14  wherein said aluminum nitride layer has a thickness ranged from 10 Å to 50 Å. 
     
     
       16. The metallizing process according to  claim 1  wherein said step d) is executed by a reactive DC sputtering. 
     
     
       17. The metallizing process according to  claim 1  wherein said titanium nitride layer having a thickness ranged from 200 Ř1,500 Å. 
     
     
       18. The metallizing process according to  claim 1  wherein said step e) further includes the following sub-steps of: 
       e1) executing a photolithography process according to a specific runner pattern to cover a photoresist layer on said titanium nitride layer;  
       e2) executing a first etching process to etch away portions of said titanium nitride layer, said dielectric layer and said conductive layer not covered by said photoresist layer; and  
       e3) executing a second etching process to etch away said photoresist layer, said titanium nitride layer and said dielectric layer.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.