Method of relieving surface tension on a semiconductor wafer

Abstract

A method used during the manufacture of a semiconductor device comprises providing a semiconductor wafer assembly, the assembly including a plurality of unsegmented semiconductor dice. A coating layer is formed over the semiconductor wafer assembly which causes the wafer to warp, for example through a surface tension exerted on the wafer assembly by the coating layer. To reduce wafer warp a series of grooves is etched or cut into the coating layer. The grooves are believed to relieve surface tension exerted on the wafer by the coating layer. An inventive structure resulting from the method is also described.

What is claimed is:  
     
       1. A method used during the formation of a semiconductor device comprising the following steps: 
       providing a semiconductor wafer assembly comprising a semiconductor wafer having a plurality of unsingularized semiconductor dice on a circuit side thereof;  
       forming a coating layer over said wafer assembly;  
       forming a series of grooves in said coating layer, wherein subsequent to said step of forming said grooves in said coating layer, said plurality of dice remain unsingularized; and  
       subsequent to forming said grooves in said coating layer, removing a portion of said semiconductor wafer from said circuit side of said wafer assembly, to singularize said plurality of dice.  
     
     
       2. The method of  claim 1  further comprising the following steps: 
       during said step of forming said grooves in said coating layer, forming said grooves over a kerf area of said semiconductor wafer; and  
       during said step of removing a portion of said semiconductor wafer from said circuit side of said wafer assembly, removing said kerf area of said semiconductor wafer to singularize said plurality of dice.  
     
     
       3. The method of  claim 2 , wherein said step of forming said grooves comprises etching said coating layer using a dry etch, and said step of removing said kerf area comprises sawing said kerf area to singularize said semiconductor dice. 
     
     
       4. The method of  claim 3  wherein said semiconductor wafer assembly further comprises a plurality of bond pads on said circuit side of said wafer assembly, further comprising the step of etching said coating layer to expose said bond pads during said step of forming said grooves. 
     
     
       5. The method of  claim 2 , wherein said step of forming said grooves comprises sawing said coating layer using a wafer saw, and said step of removing said kerf area comprises sawing said kerf area to singularize said semiconductor dice. 
     
     
       6. The method of  claim 5  further comprising the step of backlapping said semiconductor wafer subsequent to said step of forming said grooves and prior to said step of removing said kerf area. 
     
     
       7. A method used during the formation of a semiconductor device comprising the following steps: 
       providing a semiconductor wafer assembly comprising a semiconductor wafer and a plurality of unsingularized semiconductor dice, said semiconductor dice comprising a plurality of bond pads;  
       forming a coating layer over said plurality of semiconductor dice and over said bond pads;  
       removing said coating layer from over said plurality of bond pads;  
       forming a series of grooves within said coating layer;  
       backgrinding said semiconductor wafer; and  
       subsequent to said step of backgrinding said semiconductor wafer, dicing said semiconductor wafer.  
     
     
       8. The method of  claim 7  wherein said step of forming said coating layer forms a polyimide layer. 
     
     
       9. The method of  claim 8  wherein said step of forming said grooves includes forming said grooves over a kerf area of said semiconductor wafer and said step of dicing said wafer includes removing said kerf area of said wafer. 
     
     
       10. The method of  claim 8  further comprising performing said steps of removing said polyimide layer from over said plurality of bond pads and forming said grooves within said polyimide layer simultaneously. 
     
     
       11. The method of  claim 7  further comprising the step of removing a portion of said semiconductor wafer during said step of forming said grooves in said coating layer, wherein said semiconductor dice remain unsingularized during said step of backgrinding said semiconductor wafer. 
     
     
       12. A method used during the manufacture of a semiconductor device comprising the following steps: 
       providing a semiconductor wafer assembly comprising a semiconductor wafer and a plurality of unsingularized semiconductor dice, wherein said wafer exhibits a first degree of warping;  
       forming a coating overlying said semiconductor wafer, wherein said wafer, subsequent to forming said coating, exhibits a second degree of warping greater than said first degree of warping; and  
       forming a series of grooves in said coating layer wherein subsequent to forming said grooves said semiconductor dice remain unsingularized and said wafer exhibits a third degree of warping less than said second degree of warping.  
     
     
       13. The method of  claim 12  wherein said step of providing said semiconductor wafer assembly comprises providing a semiconductor wafer having an arcuate perimeter and a center portion bounded by said arcuate perimeter, and wherein said step of forming said grooves in said coating layer comprises forming said grooves to extend between at least two points of said arcuate perimeter through said center portion of said wafer. 
     
     
       14. The method of  claim 12  further comprising the following steps: 
       providing bond pads during said step of providing said semiconductor wafer assembly;  
       forming said coating overlying said bond pads during said step of forming said coating; and  
       exposing said bond pads during said step of forming said grooves.  
     
     
       15. The method of  claim 14  wherein said step of forming said grooves is performed using a dry etch. 
     
     
       16. The method of  claim 12  wherein said step of forming said grooves forms said grooves over a saw kerf area of said semiconductor wafer. 
     
     
       17. The method of  claim 16  further comprising the step of removing a portion of said semiconductor wafer during said step of forming said grooves in said coating. 
     
     
       18. The method of  claim 12  further comprising the following steps: 
       backgrinding said semiconductor wafer subsequent to said step of forming said grooves; and  
       singularizing said semiconductor dice subsequent to said step of backgrinding said semiconductor wafer.