P
US6873000B2ExpiredUtilityPatentIndex 63

Storage cell field and method of producing the same

Assignee: INFINEON TECHNOLOGIES AGPriority: Oct 5, 2001Filed: Oct 7, 2002Granted: Mar 29, 2005
Est. expiryOct 5, 2021(expired)· nominal 20-yr term from priority
Inventors:GOLDBACH MATTHIASSCHLOESSER TILL
H10D 89/213H10B 12/0385H10B 12/038H10B 12/0383
63
PatentIndex Score
2
Cited by
6
References
9
Claims

Abstract

A storage cell field has a plurality of storage cells formed in a substrate of a first doping type, said storage cells comprising a trench capacitor arranged in said substrate and a selection transistor associated with said trench capacitor and provided with a transistor body which is arranged in said substrate. An implantation having an increased dopant concentration of the first doping type is provided in said substrate. This implantation prevents space-charge zones, which are located at the trench capacitors and which are caused in predetermined storage states of said trench capacitors, from constricting a substrate region, which is available for applying a predetermined potential to the transistor bodies, in such a way that said predetermined potential cannot be applied.

Claims

exact text as granted — not AI-modified
1. A storage cell field comprising:
 a plurality of storage cells formed in a substrate of a first doping type, said storage cells including a trench capacitor arranged in said substrate and a selection transistor associated with said trench capacitor and provided with a transistor body which is arranged in said substrate,  
 an implantation having an increased dopant concentration of the first doping type in said substrate and preventing space-charge zones at the trench capacitors, which are caused in predetermined storage states of said trench capacitors, from constricting a substrate region, which is available for applying a predetermined potential to the transistor bodies, in such a way that said predetermined potential cannot be applied.  
 
   
   
     2. A storage cell field according to  claim 1 , wherein two lateral selection transistors are arranged between two trench capacitors, wherein the selection transistors each comprise a drain region of a second doping type which is connected to a buried connection area of the second doping type of an associated trench capacitor, wherein the two selection transistors arranged between the trench capacitors have a common source region between the drain regions, and wherein the implantation is provided in the substrate below said source region. 
   
   
     3. A storage cell field according to  claim 1 , wherein each trench capacitor has associated therewith a vertical selection transistor, wherein each trench capacitor has a buried connection area of a second doping type on one side thereof, wherein the implantation between juxtaposed trench capacitors is arranged adjacent to the side of the trench capacitors which is located opposite to the buried connection area. 
   
   
     4. A storage cell field according to  claim 1 , wherein the substrate is a p-type substrate and the implantation is a boron implantation. 
   
   
     5. A method of producing a storage cell field, the method comprising the following steps:
 producing a plurality of storage cells in a substrate of a first doping type, the storage cells including a trench capacitor arranged in the substrate and a selection transistor associated with the trench capacitor and provided with a transistor body which is arranged in the substrate,  
 producing in the substrate an implantation that has an increased dopant concentration of the first doping type and that prevents space-charge zones, which are located at the trench capacitors and which are caused in predetermined storage states of the trench capacitors, from constricting a substrate region, which is available for applying a predetermined potential to the transistor bodies, in such a way that the predetermined potential can no longer be applied.  
 
   
   
     6. A method according to  claim 5 , wherein two lateral selection transistors are produced between two trench capacitors, the selection transistors having a common source region, wherein dopants are introduced through the source region into the substrate during the step of producing the implantation. 
   
   
     7. A method according to  claim 5 , wherein the implantation is produced by carrying out an oblique implantation into the trench of the trench capacitor so that an implanted region is produced on one side of the trench. 
   
   
     8. A method according to  claim 7 , wherein the oblique implantation is carried out such that the implanted region is produced in opposed relationship with a buried connection area of the trench capacitor. 
   
   
     9. A method according to  claim 5 , wherein a p-type substrate is used and wherein boron is used as a dopant for producing the implantation.

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